Commit graph

85 commits

Author SHA1 Message Date
Alexandre Julliard
57c58be77d winedbg: Fix printf format warnings on ARM platforms. 2022-12-08 18:11:23 +01:00
Eric Pouech
2d8b709021 winedbg: Redefine internal types with predefined sizes.
This will help mapping a name to a basic type.

Signed-off-by: Eric Pouech <eric.pouech@gmail.com>
2022-05-24 20:09:07 +02:00
Eric Pouech
5f9d09f4bd winedbg: Remove fetch_float() method from CPU backends.
As they're all the same.

Signed-off-by: Eric Pouech <eric.pouech@gmail.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
2021-12-10 22:00:17 +01:00
Eric Pouech
e656c29e59 winedbg: Remove methods for fetching/storing integers in CPU backends.
All integer code assume CPU of debuggee encode integers:
- little endian
- 2 complement for signed integers.

Signed-off-by: Eric Pouech <eric.pouech@gmail.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
2021-12-07 20:32:14 +01:00
Eric Pouech
77f84fd4d5 winedbg: Don't pretend that all dbg_internal_var instances will hold DWORD_PTR.
Signed-off-by: Eric Pouech <eric.pouech@gmail.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
2021-12-07 20:31:28 +01:00
Eric Pouech
6cee83a665 winedbg: Protect fetch_float() in CPU backends against buffer overflow.
Signed-off-by: Eric Pouech <eric.pouech@gmail.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
2021-11-26 22:08:55 +01:00
Eric Pouech
0ed49fabc3 winedbg: Protect against incorrect integer size in be_cpu.fetch_integer() method.
Signed-off-by: Eric Pouech <eric.pouech@gmail.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
2021-11-26 22:08:55 +01:00
Alexandre Julliard
13125b51cd winedbg: Avoid using the 'long double' type.
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
2021-10-04 15:18:38 +02:00
Alexandre Julliard
b9046a4936 winedbg: Avoid using 'long' types.
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
2021-10-04 14:50:41 +02:00
Qijia Liu
0201aa3b60 winedbg: Distinguish -0 from 0.
According to A8.8.56, A8.8.64 and A8.8.81 of ARM DDI 0406C.d,
0 and -0 generate different instructions.
Manually add "-".

Signed-off-by: Qijia Liu <liumeo@pku.edu.cn>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
2021-01-04 14:11:35 +01:00
Qijia Liu
c20d49026f winedbg: Remove arm_disasm_branchreg.
According to A8.8.18 of ARM DDI 0406C.d, b instruction only takes
immediate argument.

Signed-off-by: Qijia Liu <liumeo@pku.edu.cn>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
2020-12-29 21:19:31 +01:00
Rémi Bernon
fd6ea955d4 winedbg: Remove the use of gdb specific register length.
Signed-off-by: Rémi Bernon <rbernon@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
2020-04-03 17:22:19 +02:00
Rémi Bernon
771463adbd winedbg: Add gdb register types to the register maps.
Signed-off-by: Rémi Bernon <rbernon@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
2020-04-03 17:22:08 +02:00
Rémi Bernon
a650b3d80a winedbg: Add gdb register names to the register maps.
Signed-off-by: Rémi Bernon <rbernon@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
2020-04-03 17:21:51 +02:00
Rémi Bernon
6bfaa76caa winedbg: Add gdb feature names to the register maps.
In order not to repeat the features, registers are expected to be
ordered and grouped by feature. If feature name is set only on the
first register of a new feature.

Signed-off-by: Rémi Bernon <rbernon@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
2020-04-03 17:21:28 +02:00
Józef Kucia
ff84b2f202 winedbg: Get rid of ifdefs.
Signed-off-by: Józef Kucia <jkucia@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
2018-06-19 20:52:30 +02:00
Alexandre Julliard
2fb792bd7c winedbg: Fix some compiler warnings.
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
2018-06-14 11:05:14 +02:00
Zebediah Figura
1244759036 winedbg/gdbproxy: Store the register map inside the be_cpu struct.
Signed-off-by: Zebediah Figura <zfigura@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
2018-06-14 09:29:12 +02:00
Zebediah Figura
cf349cea69 winedbg: Add a backend-specific vector for setting a thread's context.
Signed-off-by: Zebediah Figura <zfigura@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
2018-06-13 22:13:27 +02:00
Zebediah Figura
2326179312 winedbg: Add a backend-specific vector for retrieving a thread's context.
Signed-off-by: Zebediah Figura <zfigura@codeweavers.com>
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
2018-06-13 22:13:27 +02:00
Alexandre Julliard
eb337adcc2 ntdll: Fix CONTEXT definition for ARM.
Signed-off-by: Alexandre Julliard <julliard@winehq.org>
2017-12-05 13:21:31 +01:00
André Hentschel
5ac1ecfbe5 winedbg: Improve formatting of context printing. 2013-12-10 12:20:30 +01:00
Frédéric Delanoy
f23cb66db6 winedbg: Use BOOL type where appropriate. 2013-11-14 10:36:30 +01:00
Frédéric Delanoy
baf4757c46 winedbg: Amend parameter name in *_fetch_integer. 2013-11-14 10:36:27 +01:00
Frédéric Delanoy
fe580c083d winedbg: Use BOOL type where appropriate. 2013-11-11 13:27:28 +01:00
André Hentschel
371bbf8db4 winedbg: There is no hardware single stepping support on ARM. 2013-02-25 10:40:39 +01:00
Alexandre Julliard
e2761ab075 winedbg: Use an if instead of a switch in case some float types have the same size. 2013-01-08 16:35:30 +01:00
André Hentschel
3a29e87673 winedbg: Use a switch-case style implementation in thumb2_disasm_dataprocessing. 2013-01-07 11:12:54 +01:00
André Hentschel
2b9555fba8 winedbg: Add shifted register dataprocessing operators to Thumb2 disassembler. 2013-01-07 11:12:41 +01:00
André Hentschel
0004788e96 winedbg: Add modified immediate dataprocessing operators to Thumb2 disassembler. 2013-01-02 18:15:03 +01:00
André Hentschel
87fbe4ca10 winedbg: Add plain binary dataprocessing operators to Thumb2 disassembler. 2013-01-02 18:14:59 +01:00
André Hentschel
785bdb6412 winedbg: Add load/store dual/exclusive and table branch operators to Thumb2 disassembler. 2012-12-10 17:36:29 +01:00
André Hentschel
8818e25954 winedbg: Add load/str multiple operators to Thumb2 disassembler. 2012-12-07 10:35:59 +01:00
André Hentschel
096426f1f1 winedbg: Adjust copyright to avoid confusions. 2012-10-08 12:54:57 +02:00
André Hentschel
86d0c87552 winedbg: Simplify Coprocessor operators in the Thumb2 disassembler. 2012-10-08 12:54:57 +02:00
André Hentschel
a0ae8b4bd2 winedbg: Add load non-word operators to Thumb2 disassembler. 2012-10-08 12:54:56 +02:00
André Hentschel
13da3a92fd winedbg: Add preload operators for Thumb2 disassembler. 2012-10-08 12:54:56 +02:00
André Hentschel
523ca37f11 winedbg: Reorder disassembler functions to match instruction table order. 2012-10-04 10:38:19 +02:00
André Hentschel
0ef9072e0f winedbg: Add Coprocessor data transfer operators for Thumb2 disassembler. 2012-10-04 10:38:11 +02:00
André Hentschel
24abf1f68b winedbg: Add enhanced Coprocessor move operators to Thumb2 disassembler. 2012-10-04 10:38:06 +02:00
André Hentschel
129080774d winedbg: Add Coprocessor data operators for Thumb2 disassembler. 2012-10-04 10:37:58 +02:00
André Hentschel
4deaee9927 winedbg: Add control operators to Thumb2 disassembler. 2012-10-03 11:19:45 +02:00
André Hentschel
613ebcd070 winedbg: Add hint operators to Thumb2 disassembler. 2012-10-03 11:19:44 +02:00
André Hentschel
60af8659c9 winedbg: Add special register processing operators to Thumb2 disassembler. 2012-10-03 11:19:43 +02:00
André Hentschel
1e1e181b2e winedbg: Improve and add branch operators for Thumb2 disassembler. 2012-10-03 11:19:43 +02:00
André Hentschel
7e132ac1a6 winedbg: Add register data processing operators to Thumb2 disassembler. 2012-08-27 11:32:13 +02:00
André Hentschel
c5fbebd3a6 winedbg: Add store operators to Thumb2 disassembler. 2012-08-27 11:32:09 +02:00
André Hentschel
054d930bb7 winedbg: Add load word operators to Thumb2 disassembler. 2012-08-24 10:25:41 +02:00
André Hentschel
538a0abbd7 include: Rename IMAGE_FILE_MACHINE_ARMV7 to IMAGE_FILE_MACHINE_ARMNT. 2012-08-17 10:45:17 +02:00
Michael Stefaniuc
915e12e59f winedbg: Avoid TRUE:FALSE conditional expressions. 2012-08-13 17:30:01 +02:00