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Author SHA1 Message Date
Ryan Kurtz 402ffd0df3 Merge remote-tracking branch 'origin/GP-1294_AlternateREP' (Closes #731) 2021-09-22 12:55:03 -04:00
ghidorahrex 7321e2a09a Fixed MIPS bitpattern endian mixup 2021-09-17 12:03:14 -04:00
Ryan Kurtz fdbb69e712 Merge remote-tracking branch 'origin/patch' 2021-09-17 07:18:16 -04:00
caheckman 74df84bed8 Move segmentop tags into pspec 2021-09-16 14:40:04 -04:00
Ryan Kurtz b0a223e17b Merge remote-tracking branch 'origin/GP-1234_ghidorahrex_update_processor_manuals--SQUASHED' 2021-09-16 07:54:32 -04:00
Avi Saven 7c853965ec Fix semantics for certain encodings of ARM vcvt 2021-09-15 15:25:38 -04:00
ghidorahrex 3cbe4ee78d Updated aarch64 and x86 amd processor manual index files. 2021-09-15 13:26:51 -04:00
caheckman 031c079b60 Allow F2 as an alternate REP prefix 2021-09-13 16:14:24 -04:00
ghidra1 b5b4f94eed Merge remote-tracking branch 'origin/patch' 
Conflicts:
	Ghidra/Features/Decompiler/certification.manifest
 2021-09-08 23:22:35 -04:00
Philip Pemberton 84492a89d6 GP-1109 Fix 6502 SBC carry handling (Closes #3190, Closes #3189) 2021-09-08 11:51:08 -04:00
ghidra1 793ad1faae Merge remote-tracking branch 'origin/patch' 2021-09-07 21:56:38 -04:00
emteere f90e3a4627 GP-1258 code review changes 2021-09-07 12:19:41 +00:00
Ryan Kurtz 8da56f71ae Merge remote-tracking branch 
'origin/GP-1112_ghidorahrex_PR-3170_agatti_65c02' (Closes #1261, Closes
#3170)
 2021-09-03 13:38:01 -04:00
Ryan Kurtz 54b3979211 Merge remote-tracking branch 'origin/patch' 2021-09-03 13:36:13 -04:00
emteere 4d44bea5a0 GP-1258 SH4 and general reference analysis improvements 2021-09-03 15:02:09 +00:00
ghidorahrex 9c363c35c2 Fixed 65C02 ldefs 2021-09-03 10:43:05 -04:00
ghidra1 eab50936fd GP-1278 added support for additional ELF AARCH64 relocations 2021-09-03 09:35:49 -04:00
Ryan Kurtz c51183f1a2 Merge remote-tracking branch 'origin/patch' 2021-09-01 10:14:35 -04:00
ghidorahrex 56a9efee76 GP-1228: Improved modeling of FXSAVE and FXRSTOR instructions 2021-09-01 10:03:29 -04:00
Ryan Kurtz 0d6c0e3f5d Merge remote-tracking branch 'origin/GP-1212_James_SH4_fixes--SQUASHED' 2021-09-01 09:02:44 -04:00
James 92ac6a332b GP-1212 adjustments to cspec files from code review 
GP-1212 SH4 fixes
 2021-09-01 08:41:00 -04:00
Ryan Kurtz 977fa00607 Merge remote-tracking branch 
'origin/GP-1263_ghidorahrex_PR-3379_zt-chen_superh-movl-fix' (Closes
#3379)
 2021-08-31 12:53:49 -04:00
chenzitai 4d2aa982fb Fix bug in movml.l instruction of superh.sinc 
When rn_imm_08_11 is 15, it should load the value pointed by r15 to pr
instead of read the value in pr to r15 pointer.
 2021-08-28 01:29:07 +01:00
James 73d36477fa GP-1185 addressing code review comments 
GP-1185 added semantics for PSLLDQ
GP-1185 added semantics for several missing x64 vector ops
 2021-08-27 15:37:31 -04:00
Ryan Kurtz 9593f16585 Merge remote-tracking branch 
'origin/GP-1075_ghidorahrex_PR-1672_mumbel_ppcregwrite' (Closes #1672)
 2021-08-27 09:41:33 -04:00
Ryan Kurtz 69e4e0656d Merge remote-tracking branch 'origin/patch' 2021-08-24 08:45:57 -04:00
Dan c0739bbede GP-1221: Working out ARM-specific opinion that uses ldefs. 2021-08-24 08:27:22 -04:00
Ryan Kurtz 366d458407 Merge remote-tracking branch 'origin/GP-1043_ghidorahrex_ARM_adcs_sbcs_flag_fix--SQUASHED' 2021-08-17 14:47:40 -04:00
Ryan Kurtz 4645e3ce1e Merge remote-tracking branch 
'origin/GP-1220_ghidorahrex_PR-2926_nneonneo_tricore_idx' (Closes #2926)
 2021-08-17 14:45:32 -04:00
Ryan Kurtz 38887cfb65 Merge remote-tracking branch 
'origin/GP-1219_ghidorahrex_PR-2923_nneonneo_vmx_idx' (Closes #2923)
 2021-08-17 14:43:16 -04:00
Ryan Kurtz cf3b859015 Merge remote-tracking branch 
'origin/GP-1129_ghidorahrex_PR-3212_niooss-ledger_fix-mips32el-double-constant'
(Closes #3212)
 2021-08-17 14:05:10 -04:00
Ryan Kurtz 8e0c298bd3 Merge remote-tracking branch 
'origin/GP-1218_ghidorahrex_PR-2927_nneonneo_powerisa_idx' (Closes
#2927)
 2021-08-17 14:02:06 -04:00
Ryan Kurtz 54c426f117 Merge remote-tracking branch 'origin/GP-1185_x64_vector_ops--SQUASHED' 2021-08-17 13:57:19 -04:00
ghidorahrex 7130901ed5 Corrected ARM/Thumb adcs/sbcs flag update macros. 2021-08-17 10:47:43 -04:00
James 7b9e9c8ec1 GP-1185 addressing code review comments 
GP-1185 added semantics for PSLLDQ
GP-1185 added semantics for several missing x64 vector ops
 2021-08-17 09:43:04 -04:00
Ryan Kurtz bd4a5eeb97 GP-0: Fixing typo in pic18.slaspec comment (Closes #782) 2021-08-13 12:22:09 -04:00
Ryan Kurtz 751da99419 Merge remote-tracking branch 'origin/GP-1135_James_sparc_fixes--SQUASHED' 2021-08-13 12:12:24 -04:00
James ea7de5e5af GP-1135 addressing code review, replaces major version change with minor version change 
GP-1135 added explanatory comment
GP-1135 fixes to SPARC - updated major version of language
 2021-08-13 09:41:38 -04:00
ghidra1 f5615aa240 Merge remote-tracking branch 'origin/patch' 2021-08-04 19:38:26 -04:00
ghidra1 0e81327c46 Merge remote-tracking branch 'origin/GP-1163_RealModeReferences' into patch 2021-08-04 11:05:35 -04:00
ghidra1 6b04eb793f Merge remote-tracking branch 'origin/patch' 2021-08-03 19:26:00 -04:00
ghidorahrex 86a85afd1b GP-1152 Fixed issue with superh fmov/fmov.s decrement/read ordering 2021-08-03 19:21:29 -04:00
ghidra1 40abafd9c8 Merge remote-tracking branch 'origin/patch' 2021-08-02 18:01:17 -04:00
ghidra1 9ee192dbe9 Merge remote-tracking branch 'origin/GP-1167_emteere_VLDST1_fix--SQUASHED' into patch 2021-08-02 18:00:13 -04:00
emteere 3be5defc15 GP-1167 Arm VLD/ST1 instruction semantics fix 2021-08-02 17:59:22 -04:00
ghidra1 ecf196fbea Merge remote-tracking branch 'origin/patch' 2021-08-02 17:37:15 -04:00
ghidra1 0a24532bf7 GP-1110 Refactor ElfDefaultGotPltMarkup.processDynamicPLTGOT implementation, Correct duplicate ELF relocation table processing, and other minor ELF cleanup 2021-08-02 15:58:37 -04:00
Ryan Kurtz f357936a16 Merge remote-tracking branch 
'origin/GP-1054_ghidorahrex_PR-3096_agatti_6502-instruction-flags-fix'
(Closes #3096)
 2021-07-29 09:51:43 -04:00
caheckman 05f292a5e7 Let segmentop scripts follow natural parameter order 2021-07-27 14:31:12 -04:00
Antonio Flores Montoya f555d0dcb7 fix vfnma 32 bits and make all part of vfpv4 2021-07-15 14:15:03 -04:00
Antonio Flores Montoya 9230473b22 add vfma vfms vfnma and vfnms to ARM processor 2021-07-15 10:44:26 -04:00
ghidorahrex b3002b78fa Corrected MIPSLE processor tests to run correct suite. 2021-07-13 11:12:56 -04:00
Nicolas Iooss 8194ee34ec fix(mips32el): fix positions of float registers in Little-Endian MIPS32 CPU 
When loading double constants using two lwc1 instructions ("Load Word in
Coprocessor 1"), the words are swapped on Little-Endian MIPS machines.

More precisely, when compiling the following function with
mipsel-linux-gnu-gcc -O3 -mfp32 -march=mips1

    double add_0x100000000(double num) {
        return num + 4294967296.0;
    }

The produced assembly (seen with objdump) is:

    00000000 <add_0x100000000>:
       0:    3c1c0000     lui   gp,0x0
       4:    279c0000     addiu gp,gp,0
       8:    0399e021     addu  gp,gp,t9
       c:    8f820000     lw    v0,0(gp)
      10:    00000000     nop
      14:    c4400000     lwc1  $f0,0(v0)     ; load the first 32-bit word
      18:    00000000     nop
      1c:    c4410004     lwc1  $f1,4(v0)     ; load the second 32-bit word
      20:    03e00008     jr    ra
      24:    46206000     add.d $f0,$f12,$f0  ; perform the addition

(the rodata section contains "00000000 0000f041" to encode the constant).

When opening the produced file with Ghidra 10.0, the assembly code is
fine but the decompiler outputs:

    double add_0x100000000(double param_1)
    {
      return param_1 + 5.465589744795806e-315;
    }

5.465589744795806e-315 comes from the decoding of "0000f041 00000000"
instead of "00000000 0000f041": the words were swapped.

Fix this by swapping f0 and f1, f2 and f3... when using a Little-Endian
MIPS machine with 32-bit floating-point registers.
 2021-07-12 21:06:44 +02:00
ghidorahrex 0b88063785 Added 65c02 processor variant to 6502 module. 2021-07-12 13:28:30 -04:00
Alessandro Gatti 5fe32eb887 Address review issues. 2021-07-09 23:20:59 +02:00
ghidra1 cad6b3c9d9 Merge remote-tracking branch 'origin/patch' 2021-07-07 15:04:15 -04:00
ghidra1 a1bee163d1 GP-1090 added support for a few more SuperH ELF Relocation types 2021-07-07 15:03:34 -04:00
Alessandro Gatti 49ebf156d1 Fix SBC definition as per #3190. 2021-07-07 10:54:59 +02:00
ghidra1 06e3a568bc Merge remote-tracking branch 'origin/patch' 2021-07-06 17:17:55 -04:00
ghidra1 c2652d36d1 GP-1090 Added SuperH/SuperH4 ELF relocation handler and improved performance of ELF filler segment pruning to avoid uneccessary block creation 2021-07-06 17:12:18 -04:00
ghidra1 99d0e98256 Merge remote-tracking branch 
'origin/GP-1078_ghidorahrex_ARMEmulation_no_thumb'

Conflicts:
	Ghidra/Processors/ARM/src/main/java/ghidra/program/emulation/ARMEmulateInstructionStateModifier.java
 2021-07-06 16:36:01 -04:00
Alessandro Gatti 2802425d68 Add Rockwell 65C02 opcodes. 2021-07-04 16:30:04 +02:00
ghidra1 68b7628303 Merge remote-tracking branch 'origin/patch' 2021-07-02 09:21:54 -04:00
ghidra1 879a249fb1 GP-1063 corrected ARMv5 emulation issue 2021-07-02 09:14:56 -04:00
ghidorahrex c3dc05c7bf Corrected issue with ARM emulation for older versions with no thumbmode. 2021-06-30 10:00:57 -04:00
Alessandro Gatti b91b43100d Add support for 65C02 opcodes. 
Fixes #1261.
 2021-06-29 01:52:12 +02:00
mumbel d61be26b38 [PowerPC] Various SLEIGH fixes 
- Ensure registers do not overlap for source and destination registers
- preserve register values when needed
- signed issue comparing unsigned to negative
- unued argument in divZero macro
- stwcx. and stdcx. should set cr bits to continue
- out of order flag setting vs value assignment
- some fixes in setting wrong cr bit
 2021-06-25 10:54:45 -05:00
ghidra1 10fa9bcca4 Merge remote-tracking branch 'origin/GP-938_ghidorahrex_PR-3022_veritas501_fix_jic' 2021-06-23 17:54:11 -04:00
ghidra1 00ba983a42 Merge remote-tracking branch 'origin/GP-1029_ghidra1_ElfExternalRelocations--SQUASHED' into Ghidra_10.0 2021-06-09 18:26:43 -04:00
ghidra1 e89a8dcde3 GP-1029 Detect and mark unsupported EXTERNAL data relocation and correct MIPS compound relocation processing bug. 2021-06-09 18:26:05 -04:00
ghidra1 5321fe7dd8 Merge remote-tracking branch 
'origin/GP-753_ghidorahrex_PR-2864_VGKintsugi_VGKintsugi-div1' into
Ghidra_10.0 (Closes #2864, Closes #2863)
 2021-06-09 17:14:53 -04:00
ghidra1 9fd4af2d7c Merge remote-tracking branch 
'origin/GP-954_ghidorahrex_x86_64_stack_push--SQUASHED' into Ghidra_10.0
(Closes #2976)
 2021-06-09 11:02:41 -04:00
ghidorahrex a2929e0568 Implemented all combinations of 66/67/REX.W prefixes for CALLF instruction in 64-bit. 
Additional CALLF changes
More aggressive changes for x86-64 CALL/RET instructions
Fixed x86-64 call/ret instructions with prefix 67 overrides
 2021-06-09 10:22:08 -04:00
VGKintsugi 89f6e9bb7d SuperH: Additional delay slot bug fixes 
Review of all delay slot instructions.
 2021-06-03 11:39:01 -04:00
ghidra1 f2fc55554a Merge remote-tracking branch 
'origin/GP-982_ghidorahrex_x86_rdmsr--SQUASHED' into Ghidra_10.0 (Closes
#3046)
 2021-06-03 10:54:29 -04:00
Alessandro Gatti 843a5c2261 Update 6502 flags handling. 2021-06-02 16:34:00 +02:00
Alessandro Gatti d588033a56 Fix BIT instruction description. 
Flag handling for the BIT instruction did not follow the datasheet.

This fixes #2558.
 2021-06-02 15:56:32 +02:00
ghidra1 0a8db1e0ad Merge remote-tracking branch 'origin/GP-647_ghidorahrex_pic24_return_instructions' into Ghidra_10.0 2021-06-01 10:02:10 -04:00
ghidorahrex f7e6f77032 Corrected RDMSR instruction p-code for 64-bit. 2021-05-28 08:47:50 -04:00
ghidorahrex c9634dd808 Fixed correct SRL byte to grab from tmp 2021-05-21 10:44:29 -04:00
ghidorahrex 38a38056e8 removed @if NEVER blocks from PIC24.sinc 2021-05-21 10:40:38 -04:00
ghidra1 568b264bbb Merge remote-tracking branch 
'origin/GP-220_James_addrsize_bit64--SQUASHED' (Closes #2297, Closes
#2286)
 2021-05-19 22:28:05 -04:00
James 6661f9ab1f GP-220 Fixed various issues pertaining to x86 instruction prefixes. 2021-05-19 22:25:20 -04:00
ghidra1 39a609e24b Merge remote-tracking branch 
'origin/GP-937_ghidorahrex_PR-3008_bobataylor_hcs12_fix_idx1' (Closes
#3008)
 2021-05-19 15:32:49 -04:00
ghidra1 fe0b081973 Merge remote-tracking branch 
'origin/GP-939_ghidorahrex_PR-2970_bobataylor_v850_fix_mul_simm' (Closes
#2970)
 2021-05-19 15:18:04 -04:00
ghidra1 e21149816c Merge remote-tracking branch 
'origin/GP-753_ghidorahrex_PR-2864_VGKintsugi_superh_div1_fix--SQUASHED'
(Closes #2864)
 2021-05-18 09:53:31 -04:00
ghidra1 d44c91e906 Merge remote-tracking branch 'origin/GP-920_ghidorahrex_HCS12_PPAGE' 
(Closes #1099)
 2021-05-18 08:57:32 -04:00
VGKintsugi fc91a10673 SuperH: Additional delay slot bug fixes 
Review of all delay slot instructions.
SuperH: Delay slot fix for bf/s and and bt/s
Code now caches the value of the $(T_FLAG) before executing the delay slot. Previously the instruction executed in delay slot could potentially change the value of $(T_FLAG) and thereby resulting in incorrect behavior. Credit to Slinga and Waterfuell from SegaXtreme for reporting the issue.
 2021-05-17 15:49:53 -04:00
Ryan Kurtz 3a0ae8ee39 GP-849: Gradle 7 support 2021-05-12 13:45:16 -04:00
ghidra1 65e4c704ec Merge remote-tracking branch 'origin/GP-932_ghidra1_isDynamicallySized' 2021-05-12 11:02:02 -04:00
ghidra1 44d8733f8c GP-928 corrected missing operand for SPARC WR instruction 2021-05-12 09:09:15 -04:00
ghidra1 b5160b253c GP-932 renamed and corrected improper implementation and use of the 
Datatype.isDynamicallySized method
 2021-05-12 08:22:00 -04:00
veritas501 89ecfcc236 fix(mips32r6): Optimize inst jic 2021-05-12 15:02:15 +08:00
veritas501 e606a9a18f fix(mips32r6): jic is not call but jump 
See https://s3-eu-west-1.amazonaws.com/downloads-mips/documents/MD00086-2B-MIPS32BIS-AFP-6.06.pdf,
page 205 (page 215 in file).
jic is not like jialc, which set ra by `GPR[31] <- PC + 4`, it's just a jump.
So, if meet jic reg,xxx , identify it as a jump.
If meet jic ra,xxx , identify it as a return.
 2021-05-11 13:13:07 +08:00
ghidra1 29926d28d7 Merge branch 'GP-928_ghidra1_Sparc_ASR_read_write' 2021-05-10 20:56:42 -04:00
ghidra1 c45470893b Merge remote-tracking branch 'origin/GP-881_ghidorahrex_arm_thumb_sbit' 2021-05-10 20:51:43 -04:00
ghidra1 e9753ebceb Merge remote-tracking branch 
'origin/GP-841_ghidorahrex_pic16_missing_instructions--SQUASHED'

Conflicts:
	Ghidra/Processors/PIC/data/languages/pic16_instructions.sinc
 2021-05-10 20:45:41 -04:00
ghidorahrex 1e109f9474 Added Z flag updates for shift instructions. 
Added missing PIC16 instructions
 2021-05-10 10:30:10 -04:00
Ryan Kurtz c2f60b15d3 GP-700: Improved support for Mach-O MH_OBJECT files 2021-05-10 08:20:30 -04:00
ghidra1 da800b6e41 GP-862 Refactor of Composite interface and internals. Changes made to 
packing and alignment methods (see WhatsNew.html for API changes).
 2021-05-07 20:56:35 -04:00
ghidra1 517c3d8f0c GP-928 SPARC language changes. Resolved FPSR duplicate reg name and 
cleaned-up ASR read write instructions.
 2021-05-06 13:21:46 -04:00
ghidra1 3b867b3444 Merge remote-tracking branch 'origin/GP-653_caheckman_UserDefinedCspec' 2021-05-06 12:41:24 -04:00
Cameron Taylor 3a8b4bd639
HCS12: Fix IDX1 addressing with negative immediate 2021-05-05 20:19:04 -04:00
ghidra1 f7b2d49468 Corrected various language errors (PPC, SPARC, MCS96) 2021-05-04 23:24:56 -04:00
caheckman a5d4ca3cab Program specific, user-defined, cspec extensions 
Documentation for spec extensions

Handle extensions with parse errors
Export button for spec extensions
Pop-up dialog for parse errors in user-defined specification extensions
GP-653 corrected some minor issues and established new ProgramDB version
make incremental initialization constructor for AddressSized private
Make AddressSized fields private
More adjustments to AddressSized
Review fixes for BasicCompilerSpec
Take restoreXml out of DataOrganization interface
Remove restoreXml from BitFieldPacking interface
More review fixes
Prevent callotherfixup extension with non-existent target
Suggested export name
More documentation for SpecExtension
Support for undo/redo with spec extensions
Documentation for ConstructTpl
Split out ProgramCompilerSpec and other changes for review
Changes after next round of reviews
 2021-05-04 12:11:55 -04:00
ghidorahrex b7a6607464 Fixed issue with PPAGE register not being properly restored afer CALL 
instructions in HCS12
 2021-05-04 11:52:52 -04:00
ghidra1 a34644abdc Merge branch 'GP-901_ghidra1_RegisterAlias' (Closes #2956) 2021-04-30 19:42:04 -04:00
ghidra1 774f5c345a Merge branch 'GP-902_ghidra1_ElfAbsoluteSymbols' 2021-04-30 19:41:15 -04:00
ghidra1 0a85fb1984 GP-902 Modified treatment of ELF Symbols which refer to SHN_UNDEF (0) or 
SHN_ABS (0xfff1) section index values.
 2021-04-30 11:34:40 -04:00
ghidra1 a40370ab7a Revert "Merge remote-tracking branch 'origin/GP-653_UserDefinedCspec--SQUASHED'" 2021-04-30 10:34:54 -04:00
ghidra1 b7499e1bc1 Merge remote-tracking branch 'origin/GT-3668_ghidorahrex_ppc_vle_simm20' 2021-04-29 17:08:23 -04:00
caheckman ed82c2cb34 GP-653 added support for user-defined compiler spec extensions 2021-04-29 16:17:25 -04:00
ghidra1 8f9b067384 GP-901 added regiater alias support and defined WREG aliases for PIC24 
variants
 2021-04-28 16:04:03 -04:00
ghidra1 74a580191e GP-906 corrected alignment of PIC24 allocated external symbol during ELF 
import
 2021-04-28 16:01:34 -04:00
ghidorahrex 0b7a00e10b Addex 's' suffix for ARM thumb instructions which modify status flags. 2021-04-23 14:21:27 -04:00
ghidra1 a9a6ecd56c Merge remote-tracking branch 
'origin/GP-800_ghidorahrex_x86_64_address_mode_fix' (Closes #2504)
 2021-04-23 11:40:50 -04:00
ghidra1 2c5ecf12d0 Merge remote-tracking branch 'origin/GP-837_ghidorahrex_PR-1163_toshipiazza_x86-sleigh-jcc' 2021-04-23 11:23:31 -04:00
Cameron Taylor c8322ba9e7
V850: Fixed multiply by immediate 
Multiply by immediate (mul imm9, reg2, reg3) used a signed token for the lower 5 bits of the immediate value imm9.
This resulted in any immediate value in which the 5th bit was set to be calculated incorrectly.

imm9 = 0x18 ( 0b000011000 )
OLD:    f8 0f 40 52        mul    -0x8, r1, r10
NEW:   f8 0f 40 52        mul    0x18, r1, r10

imm9 = -0xF0 ( 0b100010000 )
OLD:    f0 0f 60 52        mul    -0x10, r1, r10
NEW:   f0 0f 60 52        mul    -0xf0, r1, r10
 2021-04-22 20:50:11 -04:00
ghidra1 a372f17736 Merge remote-tracking branch 
'origin/GP-841_ghidorahrex_pic16_missing_instructions' (Closes #1362)
 2021-04-21 19:11:58 -04:00
ghidra1 1e39c2ac82 Merge remote-tracking branch 'origin/patch' 2021-04-20 17:33:40 -04:00
ghidra1 baeef06672 Certification cleanup 2021-04-20 17:15:14 -04:00
VGKintsugi 0f50356e73
SuperH: Div1 Code Review Changes 2021-04-17 03:03:36 -04:00
ghidorahrex fc3fef823d Restored unpackSRL macro to return instructions. 2021-04-15 07:34:45 -04:00
ghidorahrex 84f0096e02 Fixed size for signed immediate value of the PPC VLE e_li instruction 2021-04-13 12:30:10 -04:00
ghidorahrex 18eb9bc2d2 Added missing PIC16 instructions 2021-04-12 10:52:52 -04:00
Robert Xiao d9a291ff0e
Update PowerISA.idx with correct "physical" pages 
PowerISA.idx was incorrectly using "logical" page numbers for the listings, which would not come up correctly when called from the "Processor Manuals" menu. Fixed to apply "physical" page numbering, and tested with instructions from compiling [power8.s](https://chromium.googlesource.com/chromiumos/third_party/binutils/+/refs/heads/master/gas/testsuite/gas/ppc/power8.s) and [vle.s](https://chromium.googlesource.com/chromiumos/third_party/binutils/+/refs/heads/master/gas/testsuite/gas/ppc/vle.s).
 2021-04-12 03:18:42 -06:00
Robert Xiao 049bb2a3db
Update tricore2.idx to match available docs 
The existing page numbers on tricore2.idx appear to have been obtained by adding 49 to the numbers in the index of the [documentation file](https://www.infineon.com/dgdl/Infineon-TC2xx_Architecture_vol2-UM-v01_00-EN.pdf?fileId=5546d46269bda8df0169ca1bf33124a8); however, the page numbers in the index are actually wrong, and several instructions aren't actually documented in that manual despite appearing in the index.

By scraping the bookmarks and links directly from the PDF, a corrected set of page numbers has been generated, excluding undocumented instructions.
 2021-04-12 03:15:33 -06:00
Robert Xiao 0c2dd93500
Update reference for VMX instructions 
The VMX instructions are not in `AMD64_128-bit_SSE5_Instructions.pdf`; replace with a reference to the VMX instruction guide instead.
 2021-04-12 00:59:15 -06:00
ghidorahrex 6eb6bde3f4 Simplified PIC24 return instruction semantics. 2021-04-09 14:17:40 -04:00
ghidra1 b3e90569fd Merge remote-tracking branch 'origin/GP-513_JoinedReturnValue' 2021-04-02 18:15:22 -04:00
ghidra1 8e4be06649 Merge branch 'GP-798_ghidorahrex_PR-2855_gtackett_pic24_tblpag_psvpag' 
(Closes #2855)
 2021-04-02 18:03:19 -04:00
ghidra1 086922c254 Merge remote-tracking branch 
'origin/GP-818_ghidorahrex_PR-2447_cmasupra_xra_8085' (Closes #2447)
 2021-04-02 17:41:34 -04:00
ghidorahrex 8ca49b2cac Re-ordered sleigh instructions in x86 to correct addressing mode issues. 2021-04-01 10:46:35 -04:00
ghidra1 9a8228467b Merge remote-tracking branch 
'origin/GP-703_ghidorahrex_PPC_regression_fix--SQUASHED'
 2021-03-26 16:01:32 -04:00
ghidorahrex 6afdbcfc86 GP-703 improved various return from interrupt instruction semantics for PowerPC 2021-03-26 15:58:44 -04:00
VGKintsugi 27ad2f4b8c
SuperH: simplify div1 logic 
asdf-prime's modifications to div1 instruction. See PR: https://github.com/NationalSecurityAgency/ghidra/pull/2478
 2021-03-25 02:38:21 -04:00
VGKintsugi f1fc3a29ca
SuperH: Delay slot fix for bf/s and and bt/s 
Code now caches the value of the $(T_FLAG) before executing the delay slot. Previously the instruction executed in delay slot could potentially change the value of $(T_FLAG) and thereby resulting in incorrect behavior. Credit to Slinga and Waterfuell from SegaXtreme for reporting the issue.
 2021-03-25 02:08:22 -04:00
James 75e96f6128 GP_799-James-x64_vector_op_fixes 2021-03-24 19:44:34 +00:00
caheckman 872cd724cb Split out BE and LE cspec for MIPS 2021-03-24 13:23:04 -04:00
ghidra1 966e80469d Merge remote-tracking branch 'origin/GP-703_ghidorahrex_ppc_vle_interrupt_returns' 2021-03-23 15:22:43 -04:00
ghidorahrex ffa67eb295 Refactored interrupt return instructions for PPC 2021-03-23 11:08:56 -04:00
gtackett 0cc1568871
Fix for #2844 re. addresses of TBLPAG and PSVPAG 2021-03-18 09:57:45 -04:00
ghidra1 d377d90e14 Merge remote-tracking branch 'origin/patch' 
Conflicts:
	Ghidra/Features/GraphServices/certification.manifest
 2021-03-17 19:38:50 -04:00
ghidra1 74ef9b86c7 Merge remote-tracking branch 
'origin/GP-761_ghidorahrex_PR-2451_JeffmeisterJ_fix_arm_crn1_coproc_regs'
(Closes #2451)
 2021-03-17 19:22:47 -04:00
ghidra1 82cecede95 Merge remote-tracking branch 
'origin/GP-766_ghidorahrex_PR-2829_fmagin_fix_insX_rep' (Closes #2829)
 2021-03-17 19:21:41 -04:00
ghidra1 162f203395 Updated certification headers 2021-03-17 18:22:50 -04:00
ghidra1 0bf88594c9 Merge remote-tracking branch 
'origin/GP-748_ghidorahrex_superh4_fix_bad_dummy_exports' (Closes #2638)
 2021-03-15 17:50:36 -04:00
Florian Magin 511ab0b132 Fix INSx.REP instruction 
Co-authored-by: Sam Lerner <lerner98@gmail.com>
 2021-03-11 16:28:03 +01:00
ghidra1 399dd9484f Merge remote-tracking branch 
'origin/GP-758_ghidorahrex_PR-2651_miek_68000_byte_SP' (Closes #1709,
Closes #2651)
 2021-03-10 12:58:12 -05:00
ghidra1 ab26ac95bd Merge remote-tracking branch 'origin/GP-744_ghidorahrex_x86_movups_fix' 
(Closes #2789)
 2021-03-10 12:27:10 -05:00
ghidra1 9028a3122c Merge remote-tracking branch 
'origin/GP-736_ghidorahrex_PR-2754_miek_68000_fmove_packed_dynamic'
(Closes #2754)
 2021-03-09 09:07:08 -05:00
ghidra1 478b8bdaec Merge remote-tracking branch 
'origin/GP-735_ghidorahrex_PR-2750_PhysSong_arm_vmrs_fix' (Closes #2750)
 2021-03-09 09:04:09 -05:00
ghidorahrex b5f950bb2c Removed unneeded SuperH4 dummy exports 2021-03-04 11:55:11 -05:00
ghidorahrex 9a37a3a19a Corrected processor ordering for movups pcode 2021-03-03 07:55:44 -05:00
ghidra1 bd8d076a55 GP-710 Added register symbol processing to ELF PIC30 import processing. 
Improved code unit operand format to render memory register name when no
reference is present.
 2021-02-25 19:08:18 -05:00
ghidra1 a60b89cd86 GP-710 Added support for additional PIC30 ELF relocations (closes #2792) 2021-02-25 19:08:04 -05:00
ghidra1 3fadc49006 Merge branch 'patch' 
Conflicts:
	Ghidra/Features/GnuDemangler/src/main/java/ghidra/app/util/demangler/gnu/GnuDemanglerParser.java
 2021-02-25 19:07:31 -05:00
ghidra1 cefc2e52ad Revert "GP-710 Added support for additional PIC30 ELF relocations (closes #2792)" 
This reverts commit 9c1fed6a13.
 2021-02-25 19:05:05 -05:00
ghidra1 ce910a1112 Revert "GP-710 Added register symbol processing to ELF PIC30 import processing. Improved code unit operand format to render memory register name when no reference is present." 
This reverts commit c545a6fb5a.
 2021-02-25 19:04:33 -05:00
ghidra1 ad7cc85908 Merge remote-tracking branch 'origin/patch' 2021-02-23 16:28:18 -05:00
ghidra1 c545a6fb5a GP-710 Added register symbol processing to ELF PIC30 import processing. 
Improved code unit operand format to render memory register name when no
reference is present.
 2021-02-23 16:06:45 -05:00
ghidra1 8e90dfda7e Merge remote-tracking branch 'origin/patch' 2021-02-23 12:56:10 -05:00
ghidra1 9c1fed6a13 GP-710 Added support for additional PIC30 ELF relocations (closes #2792) 2021-02-23 12:48:27 -05:00
ghidra1 890fb55378 Merge remote-tracking branch 'origin/GP-0_ryammkurtz_PR-1783_astrelsky_DataLanguageDescription' 2021-02-16 14:33:32 -05:00
ghidra1 d257602096 Merge remote-tracking branch 'origin/GP-0_ryanmkurtz_PR-1756_LorenzNickel_spelling' 2021-02-16 14:32:18 -05:00
Mike Walters 4904a0e7b5 68000: fix disassembly of fmove with dynamic k-factor 2021-02-13 02:20:52 +00:00
Hyunjin Song 6d97ccee64
Fix ARM Neon VMRS instruction for little endian 2021-02-12 13:50:37 +09:00
ghidra1 9f56e3169b GP-662 added ELF support for process-specific symbol resolution 2021-02-04 15:44:19 -05:00
ghidra1 d91dd11fdc GP-0 change PowerPC R_PPC_COPY and R_PPC64_COPY ELF relocation failure 
to a warning
 2021-02-03 10:35:25 -05:00
ghidra1 2fd92e6f23 Merge remote-tracking branch 'origin/patch' 2021-02-02 19:42:19 -05:00
emteere 3426df3ba5 GP-655_emteere Added CFINV and defined local temps, also cleaned up some 
unnecessary sub-pieces
 2021-02-02 19:21:51 +00:00
ghidra1 c728a5323e Merge remote-tracking branch 'origin/patch' 2021-02-01 11:13:24 -05:00
ghidra1 bb665bda63 GP-651 add support for ELF relocation R_X86_64_IRELATIVE 2021-02-01 10:49:49 -05:00
ghidra1 424eac6319 Merge remote-tracking branch 'origin/patch' 2021-01-26 12:14:56 -05:00
emteere 5338bb74b7 GP-627_emteere Added missing VMUL F16 variants 2021-01-26 12:09:43 -05:00
Hyunjin Song 6e7239f43a Fix some ARM NEON vmul opcodes 2021-01-26 12:09:21 -05:00
ghidra1 4129d08611 Merge remote-tracking branch 'origin/patch' 2021-01-25 15:47:43 -05:00
ghidra1 32ae57e312 Merge remote-tracking branch 
'origin/GP-33_emteere_PR-1766_mumbel_mips-rfe' into patch
 2021-01-25 15:45:45 -05:00
emteere d7a1085619 GP-33_emteere Updated comment, read Status reg only once 2021-01-25 15:21:47 -05:00
Mike Walters ad1c5d7819 68000: fix SP postincrement/predecrement with byte operands 
When the address register is the stack pointer and the operand size is
byte, the address is incremented/decremented by two to keep the stack
pointer aligned to a word boundary.
[M68000 Family Programmer’s Reference Manual; 2.2.4 & 2.2.5]

fixes #1709
 2021-01-15 19:24:45 +00:00
ghidra1 5890b88f56 Certification update 2020-12-30 09:44:29 -05:00
ghidra1 70972b33a8 Merge remote-tracking branch 'origin/patch' 2020-12-30 09:41:12 -05:00
ghidra1 1c70e034b3 Merge branch 'GP-556_ghidra1_PR-1610_bstreiff_DWARF_m68k_SVR4' 2020-12-30 09:39:24 -05:00
Matt Ihlenfield 96fe213bfd GP-555 Added support for R_ARM_MOVW_ABS_NC and R_ARM_MOVT_ABS elf 
relocations
 2020-12-30 09:21:51 -05:00
reedmideke e51639b095 Fix #2559 by removing invalid variant of vst4 2020-12-29 12:05:50 -05:00
emteere 6bce112db6 GP-548 fixed v850 JUMP register relative instruction 2020-12-29 09:08:07 -05:00
mumbel 31c466c83e Bad long size (and alignment) 2020-12-27 22:29:04 -06:00
ghidra1 5bffb5c6ed Merge remote-tracking branch 'origin/GP-389_ArmSwitchFixup' into patch 2020-12-14 12:35:04 -05:00
ghidra1 9832f58435 GP-512 corrected ARM 8-byte return storage in cspecs 2020-12-14 10:20:24 -05:00
ghidra1 64e0ef10d7 GT-3657 corrected ARM pcodeop spelling of 
coproc_moveto_Identification_registers
 2020-12-08 14:21:39 -05:00
ghidra1 d7dbcfebf5 GP-420 relaxed memory block naming restrictions and eliminated throwing of DuplicateNameException from memory block API 2020-11-23 17:35:49 -05:00
caheckman 1f443a15b4 Fix to ARM switch function fixups 2020-11-13 17:15:11 -05:00
emteere 7bd149cb84 GP-0_emteere minor change to make SP unaffected on V850 2020-11-12 20:22:24 -05:00
Jeffrey 6b145561d1 Changed Non-Secure to NonSecure, because the dash breaks the build 2020-11-12 01:46:25 +01:00
Jeffrey 823887cf89 Added missing CRn == c1, op1 == 0 coproc registers 2020-11-12 01:21:30 +01:00
Jeffrey 865b156b08 Fixed ARM coproc regs for CRn == c1 2020-11-12 01:21:03 +01:00
cmasupra 6201b9bcdf
Update 8085.slaspec with "XRA M" or "XRA HL" 
This adds the instruction "XRA M" in addition to "XRA r", which already exists. "XRA M" is the Intel format, but the code being added will keep the Ghidra format of "XRA HL". Intel's MCS-80/85(tm) Family User's Manual from October 1979 indicates "XRA M" is a 1-byte instruction with value 0xAE.
 2020-11-09 15:59:11 -06:00
astrelsky afc647a28f Prevent silent AddressOutOfBoundsException in MipsAddressAnalyzer 2020-11-05 14:13:35 -05:00
Alexey Esaulenko c97f8007a0 Z80: fix CPIR / CPDR conditions 2020-11-03 18:59:20 -05:00
ghidra1 b9d16db00e Merge remote-tracking branch 'origin/GT-3654_ghidra1_ELF_R_ARM_PC24' into Ghidra_9.2 2020-11-03 16:46:10 -05:00
emteere b1e75e0d6f GP-358_emteere Minor RISV code review changes 2020-11-03 16:41:29 -05:00
mumbel 5fe0f16e10 c.fsw broken under double-precision 
if FP is 64, should still handle single precision
 2020-11-03 16:41:28 -05:00
mumbel a487f77918 Opinion fix 
Does not handle all the cases it can, add in size IMAFC and
generic cases for GC.
 2020-11-03 16:41:27 -05:00
mumbel c9ae8bdd8d Update to RISCV processor module 2020-11-03 16:41:26 -05:00
ghidra1 434b3bbd44 GT-3654 Corrected ELF R_ARM_PC24 processing 2020-11-03 14:06:06 -05:00
ghidra1 021fbf8025 GP-348 Added ELF RELR relocation support 2020-11-01 21:41:55 -05:00
ghidra1 d3950946e6 Merge remote-tracking branch 'origin/GP-343_AARCH64neon' into Ghidra_9.2 2020-10-29 18:55:15 -04:00
ghidra1 40a55b0d6b Merge remote-tracking branch 
'origin/GP-181_James_x64_zero_extend_32_bit_results' into Ghidra_9.2
 2020-10-29 18:52:48 -04:00
caheckman 1022be3a22 eliminate rest of simd_address_at 2020-10-28 11:38:29 -04:00
caheckman a4f5472e94 Refactor AARCH64 neon 2020-10-28 11:38:26 -04:00
ghidra1 6107f29a95 GP-302 corrected issue affected ELF PLTGOT bounds determination. 
Corrected various pointer and data related issues
 2020-10-23 18:57:11 -04:00
ghidra1 b83f327e47 Added direct references to MemoryBlock.EXTERNAL_BLOCK_NAME instead of 
hard-coded string
 2020-10-08 14:04:20 -04:00
emteere a1a49b204c GP-183_emteere split cspec for SH2A which includes floating point 
registers.  Couldn't use superh.cspec. 1/2 don't have these floating
point registers
 2020-10-05 17:34:55 -04:00
emteere 42b8eb3096 GT-3394_emteere fix for wrong store/load register list in Thumb mode for 
VLDMIA/VSTMIA instructions
 2020-10-02 15:24:00 -04:00
ghidra1 2a62adfa96 Merge remote-tracking branch 'origin/GP-183__PR-2218_esaulenka_sh2-float' into Ghidra_9.2 2020-10-02 14:56:05 -04:00
James 02205b7651 GP-181 corrected numerous zero extension issues 2020-10-02 10:31:03 -04:00
ghidra1 6927b8e0f5 Corrected certification issues 2020-10-01 14:32:01 -04:00
Alexey Esaulenko 624d0f94d7 Infineon Tricore: simplify st.t instruction 2020-10-01 19:04:16 +03:00
ghidra1 39ef49d1d1 Merge remote-tracking branch 'origin/GP-49_external_disassembly_upgrade--SQUASHED' into Ghidra_9.2 2020-09-29 10:23:16 -04:00
ghidra1 356ea446c7 GP-49 external disassembly field can now switch based upon context (implemented for ARM/Thumb) 2020-09-29 10:22:46 -04:00
ghidra1 0cdc722921 Revert analyzer default enablement change 2020-09-26 08:53:30 -04:00
ghidra1 226e1952cf Merge remote-tracking branch 'origin/GT-3594_ghidorahrex_PR-1593_czietz_m68000_usp' 2020-09-24 10:41:06 -04:00
ghidra1 558844aaa9 Merge remote-tracking branch 'origin/GT-3643_ghidorahrex_arm_ldrt_bitpattern' 2020-09-22 10:26:00 -04:00
emteere a7d5e983b7 GT_3394_emteere minor fix for Arm v6 with VFPv2 but not VFPv3. Fix 
subconstructor matching for reg d0
 2020-09-21 21:20:00 -04:00
ghidra1 3e57a90f05 Merge remote-tracking branch 'origin/GT-3052_ghidorahrex_M8C' 2020-09-21 14:21:38 -04:00
ghidra1 69487edc12 Merge remote-tracking branch 
'origin/GT-3394_ghidorahrex_arm_instruction_fixup'

Conflicts:
	Ghidra/Features/Base/certification.manifest
 2020-09-21 14:06:00 -04:00
ghidra1 ef1a39fe23 Merge remote-tracking branch 'origin/GP-177_ghidra1_StickyAnalyzerEnablement' 2020-09-18 16:28:37 -04:00
ghidra1 c62adccafb Merge remote-tracking branch 'origin/GP-124_emteere_AARCH64_v8.5' 2020-09-18 16:28:05 -04:00
ghidra1 4ecf402341 Merge remote-tracking branch 'origin/GP-58_caheckman_RiscvDecodeStates' 2020-09-18 16:27:43 -04:00
ghidra1 952e7225fa Corrected certifications 2020-09-18 16:26:40 -04:00
Dan 8aba96d762 GP-134: Fixed SleighCompileRegressionTest (typo in toy.sinc) 2020-09-18 09:23:04 -04:00
Dan 8cc2ce4eb4 GP-134: Fixed typo in toy.sinc. Fixed ExternalFunctionMergeManagerTest. 2020-09-18 08:34:46 -04:00
emteere 9e0c6b9372 GT-3394 Fixing UDF instruction flow 2020-09-17 21:28:41 -04:00
ghidorahrex 3778831902 GT-3394: Created ARM v6 pspec 2020-09-17 21:28:40 -04:00
ghidorahrex ea6cfcd08c Revert "GT-3394: Fixed register definitions in VLDM/VSTM instructions" 
This reverts commit 0858a9140d0f7c9c7e1f2e412d3c19a6087e5d1e.
 2020-09-17 21:28:39 -04:00
ghidorahrex cfcfff0afc GT-3394: Fixed register definitions in VLDM/VSTM instructions 2020-09-17 21:25:50 -04:00
ghidorahrex 389387c9d3 GT-3394: Fixed ARM instruction issues 
- Added missing THUMB instruction variants
- Corrected VFPv2/VFPv3/SIMD errors
 2020-09-17 21:21:43 -04:00
ghidra1 0df36d17a3 GP-177 allow changes to Stack and PDB analyzer enablement to be retained 
as a new default enablement
 2020-09-17 19:40:35 -04:00
emteere e910b7260e GP-124 Fixed BE register zero filling, re-indexed for latest manual, add 
missing V8.6, 8.5, and 8.4 instructions
 2020-09-17 14:23:22 -04:00
ghidra1 02e017f507 Merge remote-tracking branch 'origin/GT-2567_ARM_neon_vstm' 2020-09-17 12:00:45 -04:00
tellowkrinkle cbca52f9ae Longs are 64 bits in AARCH64 GCC/Clang 2020-09-17 11:49:29 -04:00
Dan ae83715648 Re-adding toy subregisters after fixes applied to merge of GP-134. 2020-09-17 08:21:48 -04:00
emteere ad96867b74 GT-2567 fixed vldm*/vstm* semantics 2020-09-16 21:30:12 -04:00
ghidra1 40b747acee Corrected toy language compile issues 2020-09-16 14:29:10 -04:00
ghidravore b23e3a9047 Merge remote-tracking branch 'origin/GP-134_DebuggerMainlineChanges--SQUASHED' 2020-09-16 13:21:56 -04:00
ghidravore 724df5a44c GP-134: Mainline changes cherry-picked from Debugger branch 2020-09-16 13:20:45 -04:00
ghidra1 f3b4e6de16 GP-164 Added ELF ARM relocation R_ARM_PREL31 and corrected issue with 
R_ARM_ABS32 relocation.
Fixes #2261, Fixes #2276
 2020-09-16 12:48:40 -04:00
ghidra1 da92b68bcd GP-164 Corrected ELF ARM R_ARM_REL32 (type 3) relocation processing 2020-09-15 20:12:41 -04:00
emteere 82f58c22d2 GT-2567 adding missing neon instructions, correcting shift calculation 
of several neon instructions, upping version number due to
sub-constructor split
 2020-09-14 21:35:34 -04:00
emteere 93473d3282 GT-2567 fixed long standing issue with pointer source register 2020-09-14 20:50:39 -04:00
ghidorahrex 169b23b1e0 GT-2567: implemented vstmia/db and vldmia/db ARM neon instructions 2020-09-14 20:50:38 -04:00
ghidra1 04594f770b Merge remote-tracking branch 'origin/GP-68_James_arm_thumb_fixes' 2020-09-11 19:45:35 -04:00
ghidra1 85073f4c46 Merge remote-tracking branch 'origin/GP-64_ghizard_Partial_Clang_Windows_Support' 2020-09-11 19:44:58 -04:00
emteere e500396bca Updates for missing v8.5 and v8.6, more changes needed 2020-09-11 19:34:39 -04:00
James 6707536818 arch64 add with carry fixes 2020-09-11 19:34:10 -04:00
emteere c2632f16a0 GP-124_emteere_AARCH64_v8.5 first cut at 8.5 instruction extensions 2020-09-11 19:33:47 -04:00
James 5e40f00351 arm fixes 2020-09-01 21:21:29 -04:00
ghidra1 36e9e6dd66 Merge remote-tracking branch 'origin/GT-2909_emteere_Xmega' 2020-08-28 11:01:26 -04:00
emteere 599dc0a1d1 GT-2909_emteere_Xmega made memory access registers non-volatile so 
references could be made
 2020-08-27 14:00:48 -04:00
emteere 6bbcbf0277 GT-2909_emteere_Xmega minor typo changes 2020-08-25 11:39:34 -04:00
James 31a377b6d0 fixing ARMTHUMBinstructions.sinc 2020-08-25 09:42:47 -04:00
Alexey Esaulenko 90c14006ca SH2 float calling conventions 2020-08-21 11:48:44 +03:00
Alexey Esaulenko a12a0c19de SH2 float substract fix 2020-08-21 11:20:01 +03:00
ghizard 0013025a40 GP-64 Partial Clang-for-Win support: PeLoader, opinion/ldefs, fix some 
analyzers and their helpers and tests
 2020-08-10 12:23:55 -04:00
emteere 99e385da6a GT-2909 refactored IO_START implementation, added load/store of real 
flags register
 2020-08-05 13:47:51 -04:00
ghidravore e76329979a Merge remote-tracking branch 'origin/caheckman_JavaPcodeInjection' 2020-08-03 14:03:01 -04:00
ghidravore 513467b150 Merge remote-tracking branch 'origin/caheckman_RenameRegParam' 2020-08-03 13:53:52 -04:00
caheckman 2e9fdb7de8 Adjustment to RISCV decode states 2020-08-03 13:44:19 -04:00
ghidorahrex 77212ed745 Merge remote-tracking branch 
'origin/GT-54_ghidorahrex_PR-2120_ahroach_risc-v-jmp-pcode-fix'

Fixes #2120
 2020-07-31 10:51:53 -04:00
caheckman 45b43b18c3 Remove deprecated PcodeTextEmitter 2020-07-30 16:56:36 -04:00
caheckman 004a99bb87 Attach handling of "this" to ProtoParameter 2020-07-30 12:22:21 -04:00
caheckman 93039d3958 Synchronize access to ClassFileAnalysisState 2020-07-29 17:08:41 -04:00
caheckman 9c2ce9b395 Convert java InjectPayload 2020-07-29 16:00:07 -04:00
ghidra1 81f5776555 GT-2909 AVR8 ELF import and pcode test improvements 2020-07-29 14:29:46 -04:00
caheckman 2d690404fe InvokeMethodsTest passing 2020-07-29 14:02:36 -04:00
caheckman f4d25ccebb InvokeMethodsTest passes 2020-07-29 13:39:20 -04:00
caheckman 822ea1a376 ReferenceMethodsTest pass 2020-07-29 12:49:16 -04:00
caheckman 5327985d0b ReferenceMethods refactor 2020-07-29 12:18:46 -04:00
caheckman ad34d91f9b replacement for PcodeTextEmitter 2020-07-29 10:31:33 -04:00
ghidorahrex 6677daca41 Merge remote-tracking branch 'origin/GP-44_x64_sleigh_fixes' 2020-07-29 10:15:50 -04:00
James 19f8137808 GP-44 bit manipulation/shift/rotate fixes 2020-07-28 16:43:38 -04:00
emteere 1f8ced9b8d GT-2909_emteere fixing pcodeunit tests from removal of register 2020-07-24 17:47:03 -04:00
emteere 2a8a3d6ba6 GT-2909_emteere_Xmega fixed comment 2020-07-24 17:47:02 -04:00
emteere 0f8bd6b036 GT-2909_emteere_Xmega added xmega processor and missing pcode 2020-07-24 17:47:01 -04:00
Octocontrabass c9fcb5efe7
SuperH: correct rotr instruction 2020-07-23 16:05:36 -07:00
Austin Roach 688ed5e00d RISC-V j/jr semantics: use goto instead of call 
In the RISC-V binaries that I've been looking at, the j and jr
instructions have been used exclusively for intraprocedural control flow
transfers, where the function-call hinting associated with the CALL
p-code op leads to nasty side effects in the control flow
reconstruction.
 2020-07-20 20:48:37 -04:00
ghidra1 a7ab44fc6e Merge branch 'GT-0_ghidra1_PR-1891_agatti_Pic17' 2020-07-16 17:08:33 -04:00
ghidorahrex 0d180ad357 Merge remote-tracking branch 
'origin/GT-3426_ghidorahrex_PR-1383_agatti_cp1600'

Fixes #1383
 2020-07-16 14:11:26 -04:00
ghidorahrex b7481d2088 Merge remote-tracking branch 
'origin/GT-3524_ghidorahrex_PR-1450_mumbel_riscpatt'

Fixes #1450
 2020-07-16 14:09:41 -04:00
ghidorahrex 16e98bfea6 GT-3643: Corrected ARM ldrt instruction bit-pattern 2020-07-16 10:55:58 -04:00
WorksButNotTested b3b7bab4ca Added secondary selectors to ARM opinion file for correctly identifying 
ARMBE8 binaries
 2020-07-14 16:12:02 -04:00
ghidorahrex 60cd19701d GT-3426: Added certification 2020-07-14 15:54:57 -04:00
ghidorahrex cde035d8b2 Merge remote-tracking branch 
'origin/GT-3641_ghidorahrex_PR-2005_simeonpilgrim_arm_STREX_fix'

Fixes #2005, fixes #2010
 2020-07-14 14:27:43 -04:00
ghidorahrex 53a4b62726 Merge remote-tracking branch 
'origin/GP-34_ghidorahrex_PR-2088_bgK_6502-cmp-carry-flag'

Fixes #2088
 2020-07-14 09:12:33 -04:00
WorksButNotTested 556710d261 #1494: Fix incorrect handling of relocations for ARM BE8 binaries 2020-07-13 18:35:22 -04:00
Bastien Bouclet fe90271558 Fix the carry flag value for the CMP, CPX and CPY 6502 instructions 
The CPU manual states "the carry flag is set when the value in memory is
less than or equal to the accumulator, reset when it is greater than the
accumulator".
 2020-07-12 14:16:57 +02:00
ghidra1 9af174f9fe Merge remote-tracking branch 'origin/caheckman_BaseSpaceID' 2020-07-01 16:14:23 -04:00
ghidra1 8ac353572b Corrected sleigh compile failure for V850 2020-07-01 10:26:51 -04:00
ghidorahrex c5a31bb129 Merge remote-tracking branch 
'origin/GP-23_ghidorahrex_PR-1802_vvasseur_fix_teq_in_arm_thumb'

Fixes #1802
 2020-06-30 15:07:29 -04:00
ghidorahrex ae0209eede Merge remote-tracking branch 'origin/GP-18' 2020-06-30 14:10:42 -04:00