Linus Groh 20e2e39fcc Kernel: Expose size of L1 data/instruction, L2, and L3 CPU caches :^) ... These are added as properties of the "caches" object to each processor, if available.		2022-05-29 15:23:57 +02:00
..
ASM_wrapper.cpp	Kernel: Add per platform Processor.h headers	2021-10-14 01:23:08 +01:00
CPU.cpp	Everywhere: Run clang-format	2022-04-01 21:24:45 +01:00
CPUID.cpp	Kernel: Rename OSPKU CPUID feature flag to OSPKE	2022-04-08 18:53:42 +01:00
CrashHandler.cpp	Kernel: Make handle_crash available to aarch64	2022-04-02 19:34:20 -07:00
Interrupts.cpp	Kernel: Move Kernel/Arch/x86/SafeMem.h to Kernel/Arch/SafeMem.h	2022-05-03 21:53:36 +02:00
PageDirectory.cpp	Kernel: Make MemoryManager compile on aarch64	2022-04-02 19:34:20 -07:00
Processor.cpp	Kernel: Implement AVX XSAVE support	2022-05-15 12:25:23 +02:00
ProcessorInfo.cpp	Kernel: Expose size of L1 data/instruction, L2, and L3 CPU caches :^)	2022-05-29 15:23:57 +02:00
SafeMem.cpp	Kernel: Move Kernel/Arch/x86/SafeMem.h to Kernel/Arch/SafeMem.h	2022-05-03 21:53:36 +02:00
ScopedCritical.cpp	Kernel: Move ScopedCritical + SmapDisabler CPP files into x86 common	2021-10-16 15:43:41 -07:00
SmapDisabler.cpp	Kernel: Move ScopedCritical + SmapDisabler CPP files into x86 common	2021-10-16 15:43:41 -07:00
Spinlock.cpp	Kernel: Move Arch/x86/Spinlock.h and add stubs for aarch64	2022-05-03 21:53:36 +02:00
TrapFrame.cpp	Kernel: Add per platform Processor.h headers	2021-10-14 01:23:08 +01:00