qemu/hw/riscv
David Abdurachmanov fcfd1bcc30 riscv/Kconfig: enable PCI_DEVICES
Re-enable PCI_DEVICES for RISC-V.
The patch is based on other <arch>/Kconfig.

Signed-off-by: David Abdurachmanov <david.abdurachmanov@gmail.com>
Fixes: 82a230d5a3 ("riscv-softmmu.mak: replace CONFIG_* with Kconfig "select" directives")
Message-Id: <20190311091256.18385-1-david.abdurachmanov@gmail.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2019-03-11 16:33:49 +01:00
..
Kconfig riscv/Kconfig: enable PCI_DEVICES 2019-03-11 16:33:49 +01:00
Makefile.objs hw/riscv/Makefile.objs: Create CONFIG_* for riscv boards 2019-02-05 16:50:20 +01:00
riscv_hart.c riscv_hart: Fix crash when introspecting the device 2018-07-19 09:05:48 -07:00
riscv_htif.c hw: Do not include "exec/address-spaces.h" if it is not necessary 2018-06-01 14:15:10 +02:00
sifive_clint.c RISC-V: Fix CLINT timecmp low 32-bit writes 2018-12-20 12:08:43 -08:00
sifive_e.c riscv: Ensure the kernel start address is correctly cast 2019-02-11 15:56:22 -08:00
sifive_plic.c RISC-V: Fix PLIC pending bitfield reads 2018-12-20 12:08:43 -08:00
sifive_prci.c SiFive RISC-V PRCI Block 2018-03-07 08:30:28 +13:00
sifive_test.c SiFive RISC-V Test Finisher 2018-03-07 08:30:28 +13:00
sifive_u.c riscv: Ensure the kernel start address is correctly cast 2019-02-11 15:56:22 -08:00
sifive_uart.c sifive_uart: Implement interrupt pending register 2018-12-20 12:08:43 -08:00
spike.c riscv: Ensure the kernel start address is correctly cast 2019-02-11 15:56:22 -08:00
virt.c riscv: Ensure the kernel start address is correctly cast 2019-02-11 15:56:22 -08:00