mirror of
https://gitlab.com/qemu-project/qemu
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e116b92d01
-----BEGIN PGP SIGNATURE----- iQFSBAABCgA8FiEEzGIauY6CIA2RXMnEW8LFb64PMh8FAmY4wZceHG1hcmsuY2F2 ZS1heWxhbmRAaWxhbmRlLmNvLnVrAAoJEFvCxW+uDzIftQsH+wfIWymTdQMowfM6 Ze/T8KODn+MqU5eg25VPSTojnmr7LFaCj2yK6zWX61RwIqtMc3NaxX0G7ksW12/g 35ACqiEEd5WRDhAtVhj5Wp+WEDoR4AD3LWIaN7a/qjO3qb78l7Bujw3qXzGSq4lQ hST6dTgMwn5LhJOyz+5dORVUK1UZSBuDxHeKRHgdoFi6yqGQ5bao5TpaDYOnGSbx 8KPrAFfXG1T6xRS8Ih5HXAPE5VJztLFPiVtCTTrETDP/o8EzvOZj5y/nJVZXXC3N 57g+QyJX9EdrRZvobef4LnNnoZyiqG+uQNugglqZqjiiLjl6AzYxI+ed0hU+cZR9 pz76Hr8= =i2cV -----END PGP SIGNATURE----- Merge tag 'qemu-sparc-20240506' of https://github.com/mcayland/qemu into staging qemu-sparc queue # -----BEGIN PGP SIGNATURE----- # # iQFSBAABCgA8FiEEzGIauY6CIA2RXMnEW8LFb64PMh8FAmY4wZceHG1hcmsuY2F2 # ZS1heWxhbmRAaWxhbmRlLmNvLnVrAAoJEFvCxW+uDzIftQsH+wfIWymTdQMowfM6 # Ze/T8KODn+MqU5eg25VPSTojnmr7LFaCj2yK6zWX61RwIqtMc3NaxX0G7ksW12/g # 35ACqiEEd5WRDhAtVhj5Wp+WEDoR4AD3LWIaN7a/qjO3qb78l7Bujw3qXzGSq4lQ # hST6dTgMwn5LhJOyz+5dORVUK1UZSBuDxHeKRHgdoFi6yqGQ5bao5TpaDYOnGSbx # 8KPrAFfXG1T6xRS8Ih5HXAPE5VJztLFPiVtCTTrETDP/o8EzvOZj5y/nJVZXXC3N # 57g+QyJX9EdrRZvobef4LnNnoZyiqG+uQNugglqZqjiiLjl6AzYxI+ed0hU+cZR9 # pz76Hr8= # =i2cV # -----END PGP SIGNATURE----- # gpg: Signature made Mon 06 May 2024 04:40:07 AM PDT # gpg: using RSA key CC621AB98E82200D915CC9C45BC2C56FAE0F321F # gpg: issuer "mark.cave-ayland@ilande.co.uk" # gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" [full] * tag 'qemu-sparc-20240506' of https://github.com/mcayland/qemu: target/sparc: Split out do_ms16b target/sparc: Fix FPMERGE target/sparc: Fix FMULD8*X16 target/sparc: Fix FMUL8x16A{U,L} target/sparc: Fix FMUL8x16 target/sparc: Fix FEXPAND linux-user/sparc: Add more hwcap bits for sparc64 hw/sparc64: set iommu_platform=on for virtio devices attached to the sun4u machine docs/about: Deprecate the old "UltraSparc" CPU names that contain a "+" docs/system/target-sparc: Improve the Sparc documentation target/sparc/cpu: Avoid spaces by default in the CPU names target/sparc/cpu: Rename the CPU models with a "+" in their names Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| .. | ||
| aarch64 | ||
| alpha | ||
| arm | ||
| cris | ||
| generic | ||
| hexagon | ||
| hppa | ||
| i386 | ||
| include | ||
| loongarch64 | ||
| m68k | ||
| microblaze | ||
| mips | ||
| mips64 | ||
| openrisc | ||
| ppc | ||
| riscv | ||
| s390x | ||
| sh4 | ||
| sparc | ||
| x86_64 | ||
| xtensa | ||
| cpu_loop-common.h | ||
| elfload.c | ||
| errnos.c.inc | ||
| exit.c | ||
| fd-trans.c | ||
| fd-trans.h | ||
| flat.h | ||
| flatload.c | ||
| gen-vdso-elfn.c.inc | ||
| gen-vdso.c | ||
| ioctls.h | ||
| linux_loop.h | ||
| linuxload.c | ||
| loader.h | ||
| main.c | ||
| meson.build | ||
| mmap.c | ||
| qemu.h | ||
| semihost.c | ||
| signal-common.h | ||
| signal.c | ||
| socket.h | ||
| strace.c | ||
| strace.h | ||
| strace.list | ||
| syscall.c | ||
| syscall_defs.h | ||
| syscall_types.h | ||
| thunk.c | ||
| trace-events | ||
| trace.h | ||
| uaccess.c | ||
| uname.c | ||
| uname.h | ||
| user-internals.h | ||
| user-mmap.h | ||
| vm86.c | ||