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linux-user: Remove pointless CPU{ARCH}State casts
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20220509205728.51912-4-philippe.mathieu.daude@gmail.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
This commit is contained in:
Philippe Mathieu-Daudé
Laurent Vivier
parent
a0939b8916
commit
0effdc29b5
3 changed files with 25 additions and 28 deletions
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@ -1612,16 +1612,16 @@ static abi_long do_pipe(CPUArchState *cpu_env, abi_ulong pipedes,
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pipe syscall, but didn't replicate this into the pipe2 syscall. */
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if (!is_pipe2) {
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#if defined(TARGET_ALPHA)
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((CPUAlphaState *)cpu_env)->ir[IR_A4] = host_pipe[1];
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cpu_env->ir[IR_A4] = host_pipe[1];
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return host_pipe[0];
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#elif defined(TARGET_MIPS)
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((CPUMIPSState*)cpu_env)->active_tc.gpr[3] = host_pipe[1];
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cpu_env->active_tc.gpr[3] = host_pipe[1];
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return host_pipe[0];
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#elif defined(TARGET_SH4)
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((CPUSH4State*)cpu_env)->gregs[1] = host_pipe[1];
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cpu_env->gregs[1] = host_pipe[1];
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return host_pipe[0];
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#elif defined(TARGET_SPARC)
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((CPUSPARCState*)cpu_env)->regwptr[1] = host_pipe[1];
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cpu_env->regwptr[1] = host_pipe[1];
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return host_pipe[0];
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#endif
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}
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@ -7566,7 +7566,7 @@ static inline abi_long host_to_target_stat64(CPUArchState *cpu_env,
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struct stat *host_st)
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{
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#if defined(TARGET_ARM) && defined(TARGET_ABI32)
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if (((CPUARMState *)cpu_env)->eabi) {
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if (cpu_env->eabi) {
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struct target_eabi_stat64 *target_st;
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if (!lock_user_struct(VERIFY_WRITE, target_st, target_addr, 0))
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@ -7965,7 +7965,7 @@ int host_to_target_waitstatus(int status)
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static int open_self_cmdline(CPUArchState *cpu_env, int fd)
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{
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CPUState *cpu = env_cpu((CPUArchState *)cpu_env);
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CPUState *cpu = env_cpu(cpu_env);
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struct linux_binprm *bprm = ((TaskState *)cpu->opaque)->bprm;
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int i;
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@ -7982,7 +7982,7 @@ static int open_self_cmdline(CPUArchState *cpu_env, int fd)
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static int open_self_maps(CPUArchState *cpu_env, int fd)
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{
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CPUState *cpu = env_cpu((CPUArchState *)cpu_env);
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CPUState *cpu = env_cpu(cpu_env);
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TaskState *ts = cpu->opaque;
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GSList *map_info = read_self_maps();
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GSList *s;
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@ -8044,7 +8044,7 @@ static int open_self_maps(CPUArchState *cpu_env, int fd)
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static int open_self_stat(CPUArchState *cpu_env, int fd)
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{
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CPUState *cpu = env_cpu((CPUArchState *)cpu_env);
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CPUState *cpu = env_cpu(cpu_env);
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TaskState *ts = cpu->opaque;
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g_autoptr(GString) buf = g_string_new(NULL);
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int i;
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@ -8082,7 +8082,7 @@ static int open_self_stat(CPUArchState *cpu_env, int fd)
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static int open_self_auxv(CPUArchState *cpu_env, int fd)
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{
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CPUState *cpu = env_cpu((CPUArchState *)cpu_env);
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CPUState *cpu = env_cpu(cpu_env);
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TaskState *ts = cpu->opaque;
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abi_ulong auxv = ts->info->saved_auxv;
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abi_ulong len = ts->info->auxv_len;
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@ -8892,7 +8892,7 @@ static abi_long do_syscall1(CPUArchState *cpu_env, int num, abi_long arg1,
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#if defined(TARGET_NR_getxpid) && defined(TARGET_ALPHA)
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/* Alpha specific */
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case TARGET_NR_getxpid:
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((CPUAlphaState *)cpu_env)->ir[IR_A4] = getppid();
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cpu_env->ir[IR_A4] = getppid();
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return get_errno(getpid());
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#endif
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#ifdef TARGET_NR_getpid
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@ -9415,7 +9415,7 @@ static abi_long do_syscall1(CPUArchState *cpu_env, int num, abi_long arg1,
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if (!is_error(ret)) {
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host_to_target_old_sigset(&mask, &oldset);
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ret = mask;
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((CPUAlphaState *)cpu_env)->ir[IR_V0] = 0; /* force no error */
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cpu_env->ir[IR_V0] = 0; /* force no error */
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}
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#else
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sigset_t set, oldset, *set_ptr;
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@ -10035,7 +10035,7 @@ static abi_long do_syscall1(CPUArchState *cpu_env, int num, abi_long arg1,
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}
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#ifdef TARGET_ALPHA
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/* Return value is the unbiased priority. Signal no error. */
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((CPUAlphaState *)cpu_env)->ir[IR_V0] = 0;
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cpu_env->ir[IR_V0] = 0;
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#else
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/* Return value is a biased priority to avoid negative numbers. */
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ret = 20 - ret;
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@ -11415,7 +11415,7 @@ static abi_long do_syscall1(CPUArchState *cpu_env, int num, abi_long arg1,
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{
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uid_t euid;
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euid=geteuid();
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((CPUAlphaState *)cpu_env)->ir[IR_A4]=euid;
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cpu_env->ir[IR_A4]=euid;
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}
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return get_errno(getuid());
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#endif
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@ -11425,7 +11425,7 @@ static abi_long do_syscall1(CPUArchState *cpu_env, int num, abi_long arg1,
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{
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uid_t egid;
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egid=getegid();
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((CPUAlphaState *)cpu_env)->ir[IR_A4]=egid;
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cpu_env->ir[IR_A4]=egid;
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}
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return get_errno(getgid());
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#endif
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@ -11437,7 +11437,7 @@ static abi_long do_syscall1(CPUArchState *cpu_env, int num, abi_long arg1,
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case TARGET_GSI_IEEE_FP_CONTROL:
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{
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uint64_t fpcr = cpu_alpha_load_fpcr(cpu_env);
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uint64_t swcr = ((CPUAlphaState *)cpu_env)->swcr;
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uint64_t swcr = cpu_env->swcr;
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swcr &= ~SWCR_STATUS_MASK;
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swcr |= (fpcr >> 35) & SWCR_STATUS_MASK;
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@ -11479,8 +11479,7 @@ static abi_long do_syscall1(CPUArchState *cpu_env, int num, abi_long arg1,
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* could be queried. Therefore, we store the status
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* bits only in FPCR.
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*/
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((CPUAlphaState *)cpu_env)->swcr
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= swcr & (SWCR_TRAP_ENABLE_MASK | SWCR_MAP_MASK);
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cpu_env->swcr = swcr & (SWCR_TRAP_ENABLE_MASK | SWCR_MAP_MASK);
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fpcr = cpu_alpha_load_fpcr(cpu_env);
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fpcr &= ((uint64_t)FPCR_DYN_MASK << 32);
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@ -11504,7 +11503,7 @@ static abi_long do_syscall1(CPUArchState *cpu_env, int num, abi_long arg1,
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fex = alpha_ieee_fpcr_to_swcr(fpcr);
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fex = exc & ~fex;
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fex >>= SWCR_STATUS_TO_EXCSUM_SHIFT;
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fex &= ((CPUArchState *)cpu_env)->swcr;
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fex &= (cpu_env)->swcr;
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/* Update the hardware fpcr. */
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fpcr |= alpha_ieee_swcr_to_fpcr(exc);
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@ -11536,9 +11535,8 @@ static abi_long do_syscall1(CPUArchState *cpu_env, int num, abi_long arg1,
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info.si_signo = SIGFPE;
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info.si_errno = 0;
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info.si_code = si_code;
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info._sifields._sigfault._addr
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= ((CPUArchState *)cpu_env)->pc;
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queue_signal((CPUArchState *)cpu_env, info.si_signo,
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info._sifields._sigfault._addr = (cpu_env)->pc;
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queue_signal(cpu_env, info.si_signo,
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QEMU_SI_FAULT, &info);
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}
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ret = 0;
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@ -11824,7 +11822,7 @@ static abi_long do_syscall1(CPUArchState *cpu_env, int num, abi_long arg1,
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to_flock64_fn *copyto = copy_to_user_flock64;
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#ifdef TARGET_ARM
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if (!((CPUARMState *)cpu_env)->eabi) {
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if (!cpu_env->eabi) {
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copyfrom = copy_from_user_oabi_flock64;
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copyto = copy_to_user_oabi_flock64;
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}
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@ -12052,13 +12050,13 @@ static abi_long do_syscall1(CPUArchState *cpu_env, int num, abi_long arg1,
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#ifdef TARGET_NR_set_thread_area
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case TARGET_NR_set_thread_area:
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#if defined(TARGET_MIPS)
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((CPUMIPSState *) cpu_env)->active_tc.CP0_UserLocal = arg1;
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cpu_env->active_tc.CP0_UserLocal = arg1;
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return 0;
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#elif defined(TARGET_CRIS)
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if (arg1 & 0xff)
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ret = -TARGET_EINVAL;
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else {
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((CPUCRISState *) cpu_env)->pregs[PR_PID] = arg1;
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cpu_env->pregs[PR_PID] = arg1;
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ret = 0;
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}
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return ret;
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@ -12785,8 +12783,7 @@ static abi_long do_syscall1(CPUArchState *cpu_env, int num, abi_long arg1,
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info.si_errno = 0;
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info.si_code = TARGET_SEGV_MAPERR;
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info._sifields._sigfault._addr = arg6;
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queue_signal((CPUArchState *)cpu_env, info.si_signo,
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QEMU_SI_FAULT, &info);
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queue_signal(cpu_env, info.si_signo, QEMU_SI_FAULT, &info);
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ret = 0xdeadbeef;
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}
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@ -54,7 +54,7 @@ const char *cpu_to_uname_machine(CPUArchState *cpu_env)
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return "armv5te" utsname_suffix;
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#elif defined(TARGET_I386) && !defined(TARGET_X86_64)
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/* see arch/x86/kernel/cpu/bugs.c: check_bugs(), 386, 486, 586, 686 */
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CPUState *cpu = env_cpu((CPUX86State *)cpu_env);
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CPUState *cpu = env_cpu(cpu_env);
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int family = object_property_get_int(OBJECT(cpu), "family", NULL);
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if (family == 4) {
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return "i486";
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@ -134,7 +134,7 @@ void print_termios(void *arg);
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#ifdef TARGET_ARM
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static inline int regpairs_aligned(CPUArchState *cpu_env, int num)
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{
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return ((((CPUARMState *)cpu_env)->eabi) == 1) ;
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return cpu_env->eabi == 1;
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}
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#elif defined(TARGET_MIPS) && defined(TARGET_ABI_MIPSO32)
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static inline int regpairs_aligned(CPUArchState *cpu_env, int num) { return 1; }
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