qemu/target/avr
Akihiko Odaki ecd6f6a882 gdbstub: Infer number of core registers from XML
GDBFeature has the num_regs member so use it where applicable to
remove magic numbers.

Signed-off-by: Akihiko Odaki <akihiko.odaki@daynix.com>
Message-Id: <20231213-gdb-v17-8-777047380591@daynix.com>
[AJB: remove core reg check from microblaze read reg]
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240227144335.1196131-13-alex.bennee@linaro.org>
2024-02-28 09:09:58 +00:00
..
cpu-param.h target/avr: Remove NB_MMU_MODES define 2023-03-13 06:44:37 -07:00
cpu-qom.h target: Move ArchCPUClass definition to 'cpu.h' 2023-11-07 13:08:48 +01:00
cpu.c gdbstub: Infer number of core registers from XML 2024-02-28 09:09:58 +00:00
cpu.h include/exec: Implement cpu_mmu_index generically 2024-02-03 16:46:10 +10:00
disas.c meson: target 2020-08-21 06:30:35 -04:00
gdbstub.c gdbstub: move register helpers into standalone include 2023-03-07 20:44:08 +00:00
helper.c target/translate: Include missing 'exec/cpu_ldst.h' header 2023-08-31 19:47:43 +02:00
helper.h target/avr: Mark some helpers noreturn 2021-07-09 09:42:28 -07:00
insn.decode target/avr: Add instruction translation - MCU Control Instructions 2020-07-11 11:02:05 +02:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
machine.c target/avr: Constify VMState in machine.c 2023-12-29 11:17:30 +11:00
meson.build meson: Rename target_softmmu_arch -> target_system_arch 2023-10-07 19:03:07 +02:00
translate.c target: Use vaddr in gen_intermediate_code 2024-01-29 07:06:03 +10:00