qemu/include/exec
Peter Maydell 6c4591566d target-arm queue:
* new model of the ARM MPS2/MPS2+ FPGA based development board
  * clean up DISAS_* exit conditions and fix various regressions
    since commits e75449a346 8a6b28c7b5 (in particular including
    ones which broke OP-TEE guests)
  * make Cortex-M3 and M4 correctly default to 8 PMSA regions
 -----BEGIN PGP SIGNATURE-----
 Version: GnuPG v1
 
 iQIcBAABCAAGBQJZbLEBAAoJEDwlJe0UNgzeTqsP/06M2a/rswUKjIGAsXv+TeTl
 5N31g9E6Jr57HXK94Q0XtNkLlPwvIn97Dcv6VKg5+E8OgJx7ozldwZVFghWvMbOA
 mbaikzgTRRUf6ydNTA4DtWYZPkaLNT86Vmb2T1GKS0nmw2ymd+hMLNk5vZd1jhDv
 krHxwECI5e+u1INpw7erlQ2mqVP1NjvOuMNtjdAgtJ5tnjFRfQaVedePmr5qOuIK
 xkYMKMNtled/KS0gP4TaSu5S012iYhzrpKISN/g4WHT/8kllr+iEowNAOJSJ6l38
 oaBJJJCsLwnnV1nRClp4NNQv0Q/RXyIex5mPkeWERk4QU9adSDHnYJR7xn7JEyzV
 l9o+av28bXA7l3C8BOi3ahSGh5cDu+hif0Biml/Kke7e4+1Lp3/QWSQ+p/E5PDDq
 rhk65cg07PxSHeogN8hgu+RYN0gF3WBKASwUIDAkVdBsLlH8LVmoT5DtllL+6PyY
 cwCp3nWeu0q2YDxGOfCZrUC4YJMl8hqHoWbdVah8vLKV/w/JVUtVEIol0za50dzG
 ii6wOLqzV8GH0vkVa5x0InlH+t+/LtDRVkgHUT3/64eEEG+SsK/GmZeEtvcmp7GP
 7Qx+Dd7hPgh+uis0XZPz37vqyCYhaFNw1+M9EESlQKUKfdY8B5B5bpXVDOBF+0Zl
 daOoMw8xBd21DXNk9tCk
 =gVxi
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20170717' into staging

target-arm queue:
 * new model of the ARM MPS2/MPS2+ FPGA based development board
 * clean up DISAS_* exit conditions and fix various regressions
   since commits e75449a346 8a6b28c7b5 (in particular including
   ones which broke OP-TEE guests)
 * make Cortex-M3 and M4 correctly default to 8 PMSA regions

# gpg: Signature made Mon 17 Jul 2017 13:43:45 BST
# gpg:                using RSA key 0x3C2525ED14360CDE
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>"
# gpg:                 aka "Peter Maydell <pmaydell@gmail.com>"
# gpg:                 aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>"
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83  15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20170717:
  MAINTAINERS: Add entries for MPS2 board
  hw/arm/mps2: Add ethernet
  hw/arm/mps2: Add SCC
  hw/misc/mps2_scc: Implement MPS2 Serial Communication Controller
  hw/arm/mps2: Add timers
  hw/char/cmsdk-apb-timer: Implement CMSDK APB timer device
  hw/arm/mps2: Add UARTs
  hw/char/cmsdk-apb-uart.c: Implement CMSDK APB UART
  hw/arm/mps2: Implement skeleton mps2-an385 and mps2-an511 board models
  target/arm: use DISAS_EXIT for eret handling
  target/arm: use gen_goto_tb for ISB handling
  target/arm/translate: ensure gen_goto_tb sets exit flags
  target/arm/translate.h: expand comment on DISAS_EXIT
  target/arm/translate: make DISAS_UPDATE match declared semantics
  include/exec/exec-all: document common exit conditions
  target/arm: Make Cortex-M3 and M4 default to 8 PMSA regions
  qdev: support properties which don't set a default value
  qdev-properties.h: Explicitly set the default value for arraylen properties

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2017-07-18 10:35:06 +01:00
..
user linux-user: Use correct alignment for long long on i386 guests 2016-08-04 16:34:59 +03:00
address-spaces.h Clean up header guards that don't match their file name 2016-07-12 16:19:16 +02:00
cpu-all.h exec: introduce MemoryRegionCache 2016-12-22 16:00:23 +01:00
cpu-common.h cpu: Introduce a wrapper for tlb_flush() that can be used in common code 2017-07-04 14:30:03 +02:00
cpu-defs.h tcg: add CONFIG_TCG guards in headers 2017-07-05 09:11:08 +02:00
cpu_ldst.h cpu_ldst.h: use correct guest address parameter 2016-11-22 23:26:51 +01:00
cpu_ldst_template.h trace: switch to modular code generation for sub-directories 2017-01-31 17:11:18 +00:00
cpu_ldst_useronly_template.h trace: switch to modular code generation for sub-directories 2017-01-31 17:11:18 +00:00
cputlb.h cputlb: atomically update tlb fields used by tlb_reset_dirty 2017-02-24 10:32:46 +00:00
exec-all.h target-arm queue: 2017-07-18 10:35:06 +01:00
gdbstub.h gdbstub: rename cpu_index -> cpu_gdb_index 2017-07-14 12:04:41 +02:00
gen-icount.h gen-icount: use tcg_ctx.tcg_env instead of cpu_env 2017-06-30 11:40:59 -07:00
helper-gen.h Clean up decorations and whitespace around header guards 2016-07-12 16:20:46 +02:00
helper-head.h Clean up header guards that don't match their file name 2016-07-12 16:19:16 +02:00
helper-proto.h Clean up decorations and whitespace around header guards 2016-07-12 16:20:46 +02:00
helper-tcg.h Clean up decorations and whitespace around header guards 2016-07-12 16:20:46 +02:00
hwaddr.h hw: Clean up includes 2016-06-07 18:19:23 +03:00
ioport.h hw: clean up hw/hw.h includes 2016-05-19 16:42:30 +02:00
log.h log: do not unnecessarily include qom/cpu.h 2016-02-03 09:19:10 +00:00
memattrs.h hw/pci: Introduce pci_requester_id() 2015-10-19 10:13:07 +02:00
memory-internal.h memory: unregister AddressSpace MemoryListener within BQL 2015-02-10 10:25:44 -07:00
memory.h memory.h: Add memory_region_init_{ram, rom, rom_device}() handling migration 2017-07-14 17:59:42 +01:00
poison.h include/exec/poison: Mark CONFIG_SOFTMMU as poisoned 2017-07-04 14:39:11 +02:00
ram_addr.h exec: fix access to ram_list.dirty_memory when sync dirty bitmap 2017-06-28 12:23:58 +02:00
ramlist.h ramblock: add new hmp command "info ramblock" 2017-05-17 17:31:16 +01:00
semihost.h semihosting: add --semihosting-config arg sub-argument 2015-06-19 14:17:45 +01:00
softmmu-semi.h Clean up decorations and whitespace around header guards 2016-07-12 16:20:46 +02:00
target_page.h migration: Make savevm.c target independent 2017-05-18 19:21:00 +02:00
tb-context.h tcg: allocate TB structs before the corresponding translated code 2017-06-19 11:10:59 -07:00
tb-hash-xx.h exec: [tcg] Use different TBs according to the vCPU's dynamic tracing state 2017-07-17 13:11:05 +01:00
tb-hash.h exec: [tcg] Use different TBs according to the vCPU's dynamic tracing state 2017-07-17 13:11:05 +01:00