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15f07fb821
Split the sysbus version to a separate file so that it is not included in PCI-only machines, and adjust Kconfig for machines that do need sysbus-ohci. The copyrights are based on the time and employer of balrog and Paul Brook's contributions. While adjusting the SM501 dependency, move it to the right place instead of keeping it in the R4D machine. Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240223124406.234509-10-pbonzini@redhat.com> [PMD: Rename some functions using 'ohci_sysbus_' prefix] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
89 lines
2.7 KiB
C
89 lines
2.7 KiB
C
/*
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* QEMU USB OHCI Emulation
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* Copyright (c) 2006 Openedhand Ltd.
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* Copyright (c) 2010 CodeSourcery
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* Copyright (c) 2024 Red Hat, Inc.
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "hw/irq.h"
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#include "qapi/error.h"
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#include "qemu/module.h"
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#include "qemu/timer.h"
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#include "hw/usb.h"
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#include "migration/vmstate.h"
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#include "hw/sysbus.h"
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#include "hw/qdev-dma.h"
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#include "hw/qdev-properties.h"
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#include "trace.h"
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#include "hcd-ohci.h"
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static void ohci_sysbus_realize(DeviceState *dev, Error **errp)
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{
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OHCISysBusState *s = SYSBUS_OHCI(dev);
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SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
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Error *err = NULL;
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usb_ohci_init(&s->ohci, dev, s->num_ports, s->dma_offset,
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s->masterbus, s->firstport,
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&address_space_memory, ohci_sysbus_die, &err);
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if (err) {
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error_propagate(errp, err);
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return;
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}
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sysbus_init_irq(sbd, &s->ohci.irq);
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sysbus_init_mmio(sbd, &s->ohci.mem);
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}
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static void ohci_sysbus_reset(DeviceState *dev)
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{
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OHCISysBusState *s = SYSBUS_OHCI(dev);
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OHCIState *ohci = &s->ohci;
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ohci_hard_reset(ohci);
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}
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static Property ohci_sysbus_properties[] = {
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DEFINE_PROP_STRING("masterbus", OHCISysBusState, masterbus),
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DEFINE_PROP_UINT32("num-ports", OHCISysBusState, num_ports, 3),
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DEFINE_PROP_UINT32("firstport", OHCISysBusState, firstport, 0),
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DEFINE_PROP_DMAADDR("dma-offset", OHCISysBusState, dma_offset, 0),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void ohci_sysbus_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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dc->realize = ohci_sysbus_realize;
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set_bit(DEVICE_CATEGORY_USB, dc->categories);
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dc->desc = "OHCI USB Controller";
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device_class_set_props(dc, ohci_sysbus_properties);
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dc->reset = ohci_sysbus_reset;
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}
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static const TypeInfo ohci_sysbus_types[] = {
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{
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.name = TYPE_SYSBUS_OHCI,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(OHCISysBusState),
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.class_init = ohci_sysbus_class_init,
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},
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};
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DEFINE_TYPES(ohci_sysbus_types);
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