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qemu/target-mips
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Yongbok Kim 60270f85cc target-mips: fix updating XContext on mmu exception 
Correct updating XContext.Region field on mmu exceptions.
If Config3.CTXTC = 0 then the R field of XContext has to be updated
with the value of bits 63..62 of the virtual address upon a TLB
exception.
Also fixed the below line which overs 80 characters.

Signed-off-by: Yongbok Kim <yongbok.kim@imgtec.com>
Reviewed-by: James Hogan <james.hogan@imgtec.com>
Reviewed-by: Leon Alrae <leon.alrae@imgtec.com>
Signed-off-by: Leon Alrae <leon.alrae@imgtec.com>
2015-10-30 14:36:19 +00:00
..
cpu-qom.h target-mips: replace cpu_save/cpu_load with VMStateDescription 2015-03-11 14:13:57 +00:00
cpu.c target-mips: implement the CPU wake-up on non-enabled interrupts in R6 2015-10-29 16:16:44 +00:00
cpu.h target-mips: add PC, XNP reg numbers to RDHWR 2015-10-30 14:35:52 +00:00
dsp_helper.c target-mips: Fix warning from Sparse 2015-03-19 11:11:55 +03:00
gdbstub.c target-mips: Add missing calls to synchronise SoftFloat status 2014-12-16 12:45:20 +00:00
helper.c target-mips: fix updating XContext on mmu exception 2015-10-30 14:36:19 +00:00
helper.h target-mips: add PC, XNP reg numbers to RDHWR 2015-10-30 14:35:52 +00:00
kvm.c kvm: Pass PCI device pointer to MSI routing functions 2015-10-19 10:13:07 +02:00
kvm_mips.h target-mips: kvm: Add main KVM support for MIPS 2014-06-18 16:58:52 +02:00
lmi_helper.c tcg: Invert the inclusion of helper.h 2014-05-28 09:33:54 -07:00
machine.c target-mips: fix passing incompatible pointer type in machine.c 2015-07-28 08:57:50 +01:00
Makefile.objs target-mips: add Unified Hosting Interface (UHI) support 2015-06-26 09:08:50 +01:00
mips-defs.h target-mips: fix MIPS64R6-generic configuration 2015-07-15 14:07:10 +01:00
mips-semi.c target-mips: fix resource leak reported by Coverity 2015-07-15 14:07:25 +01:00
msa_helper.c target-mips: improve exception handling 2015-09-18 12:07:24 +01:00
op_helper.c target-mips: add PC, XNP reg numbers to RDHWR 2015-10-30 14:35:52 +00:00
TODO target-mips: Change TODO file 2012-10-31 21:37:24 +01:00
translate.c target-mips: add SIGRIE instruction 2015-10-30 14:36:19 +00:00
translate_init.c target-mips: Set Config5.XNP for R6 cores 2015-10-30 14:36:19 +00:00