qemu/hw/riscv
Thomas Huth 259181d29f hw: Add a Kconfig switch for the TYPE_CPU_CLUSTER device
The cpu-cluster device is only needed for some few arm and riscv
machines. Let's avoid compiling and linking it if it is not really
necessary.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20240415065655.130099-3-thuth@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-04-25 12:48:12 +02:00
..
boot.c hw: riscv: Allow large kernels to boot by moving the initrd further away in RAM 2024-03-08 15:41:31 +10:00
Kconfig hw: Add a Kconfig switch for the TYPE_CPU_CLUSTER device 2024-04-25 12:48:12 +02:00
meson.build hw/riscv/virt: Enable basic ACPI infrastructure 2023-03-06 11:35:04 -08:00
microchip_pfsoc.c hw/riscv: use qemu_configure_nic_device() 2024-02-02 16:23:47 +00:00
numa.c hw/riscv/numa.c: use g_autofree in socket_fdt_write_distance_matrix() 2024-02-09 20:43:14 +10:00
opentitan.c hw/riscv: opentitan: Fixup local variables shadowing 2023-09-29 10:07:20 +02:00
riscv_hart.c hw/riscv: hart: Add a new 'resetvec' property 2020-09-09 15:54:18 -07:00
shakti_c.c hw/riscv/shakti_c: Check CPU type in machine_run_board_init() 2024-01-05 16:20:15 +01:00
sifive_e.c riscv: Fix SiFive E CLINT clock frequency 2023-11-22 13:57:19 +10:00
sifive_u.c target/riscv: support new isa extension detection devicetree properties 2024-02-09 20:43:14 +10:00
spike.c target/riscv: support new isa extension detection devicetree properties 2024-02-09 20:43:14 +10:00
virt-acpi-build.c target/riscv: fix ACPI MCFG table 2024-03-08 21:00:37 +10:00
virt.c hw/riscv/virt: Replace sprintf by g_strdup_printf 2024-04-25 12:48:12 +02:00