Jisheng Zhang c3dffa879c riscv: dts: sophgo: add initial CV1800B SoC device tree ... Add initial device tree for the CV1800B RISC-V SoC by SOPHGO. Signed-off-by: Jisheng Zhang <jszhang@kernel.org> Acked-by: Chen Wang <unicorn_wang@outlook.com> Signed-off-by: Conor Dooley <conor.dooley@microchip.com>		2023-10-07 14:17:12 +01:00
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dts	riscv: dts: sophgo: add initial CV1800B SoC device tree	2023-10-07 14:17:12 +01:00
.gitignore	riscv: efi: enable generic EFI compressed boot	2022-09-20 09:50:30 +02:00
install.sh	kbuild: factor out the common installation code into scripts/install.sh	2022-05-11 21:45:53 +09:00
loader.lds.S	riscv: Move kernel mapping outside of linear mapping	2021-04-26 08:25:04 -07:00
loader.S	riscv: provide a flat image loader	2019-11-17 15:17:39 -08:00
Makefile	riscv: Use --emit-relocs in order to move .rela.dyn in init	2023-04-19 07:46:33 -07:00