Replace the busy wait for free tcs slots in the RPMh driver with a
sleeping wait and use memory barriers when writing the command registers.
Add a bunch of SoC ids to the socinfo driver, fix an erro printin the
apr driver and migrate llcc to devm_platform_ioremap_resource_byname().
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Merge tag 'qcom-drivers-for-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/drivers
Qualcomm driver updates for v5.10
Replace the busy wait for free tcs slots in the RPMh driver with a
sleeping wait and use memory barriers when writing the command registers.
Add a bunch of SoC ids to the socinfo driver, fix an erro printin the
apr driver and migrate llcc to devm_platform_ioremap_resource_byname().
* tag 'qcom-drivers-for-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
soc: qcom: llcc: use devm_platform_ioremap_resource_byname()
soc: qcom: apr: Fixup the error displayed on lookup failure
soc: qcom: socinfo: Add msm8992/4 and apq8094 SoC IDs
soc: qcom: rpmh-rsc: Sleep waiting for tcs slots to be free
soc: qcom-geni-se: Don't use relaxed writes when writing commands
soc: qcom: socinfo: add SC7180 entry to soc_id array
soc: qcom: socinfo: add soc id for IPQ6018
Link: https://lore.kernel.org/r/20200924040504.179708-1-bjorn.andersson@linaro.org
Signed-off-by: Olof Johansson <olof@lixom.net>
- Use dev_err_probe() to simplify error handling for i.MX GPCv2 driver.
- Add a check in i.MX SCU power domain driver to ignore the power
domains that are not owned by the current partition.
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Merge tag 'imx-drivers-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/drivers
i.MX drivers update for 5.10:
- Use dev_err_probe() to simplify error handling for i.MX GPCv2 driver.
- Add a check in i.MX SCU power domain driver to ignore the power
domains that are not owned by the current partition.
* tag 'imx-drivers-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
firmware: imx: scu-pd: ignore power domain not owned
soc: imx: gpcv2: Use dev_err_probe() to simplify error handling
Link: https://lore.kernel.org/r/20200923073009.23678-1-shawnguo@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
Consist of:
- Add Ring accelerator support for AM65x
- Add TI PRUSS platform driver and enable it on available platforms
- Extend PRUSS driver for CORECLK_MUX/IEPCLK_MUX support
- UDMA rx ring pair fix
- Add socinfo entry for J7200
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Merge tag 'drivers_soc_for_5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into arm/drivers
ARM: soc: TI driver updates for v5.10
Consist of:
- Add Ring accelerator support for AM65x
- Add TI PRUSS platform driver and enable it on available platforms
- Extend PRUSS driver for CORECLK_MUX/IEPCLK_MUX support
- UDMA rx ring pair fix
- Add socinfo entry for J7200
* tag 'drivers_soc_for_5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
Add missing '#' to fix schema errors:
soc: ti: Convert to DEFINE_SHOW_ATTRIBUTE
dmaengine: ti: k3-udma-glue: Fix parameters for rx ring pair request
soc: ti: k3-socinfo: Add entry for J7200
soc: ti: pruss: support CORECLK_MUX and IEPCLK_MUX
dt-bindings: soc: ti: Update TI PRUSS bindings regarding clock-muxes
firmware: ti_sci: allow frequency change for disabled clocks by default
soc: ti: ti_sci_pm_domains: switch to use multiple genpds instead of one
soc: ti: pruss: Enable support for ICSSG subsystems on K3 J721E SoCs
soc: ti: pruss: Enable support for ICSSG subsystems on K3 AM65x SoCs
soc: ti: pruss: Add support for PRU-ICSS subsystems on 66AK2G SoC
soc: ti: pruss: Add support for PRU-ICSS subsystems on AM57xx SoCs
soc: ti: pruss: Add support for PRU-ICSSs on AM437x SoCs
soc: ti: pruss: Add a platform driver for PRUSS in TI SoCs
dt-bindings: soc: ti: Add TI PRUSS bindings
bindings: soc: ti: soc: ringacc: remove ti,dma-ring-reset-quirk
soc: ti: k3: ringacc: add am65x sr2.0 support
Link: https://lore.kernel.org/r/1600656828-29267-1-git-send-email-santosh.shilimkar@oracle.com
Signed-off-by: Olof Johansson <olof@lixom.net>
This is a minor change that implements a BPMP workaround for pre-silicon
platforms and is needed to enable support for BPMP on Tegra234.
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Merge tag 'tegra-for-5.10-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers
firmware: tegra: Changes for v5.10-rc1
This is a minor change that implements a BPMP workaround for pre-silicon
platforms and is needed to enable support for BPMP on Tegra234.
* tag 'tegra-for-5.10-firmware' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
firmware: tegra: Enable BPMP support on Tegra234
Link: https://lore.kernel.org/r/20200918150303.3938852-3-thierry.reding@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
These changes contain a bit of cleanup and chip support for the upcoming
Tegra234 SoC.
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Merge tag 'tegra-for-5.10-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/drivers
soc/tegra: Changes for v5.10-rc1
These changes contain a bit of cleanup and chip support for the upcoming
Tegra234 SoC.
* tag 'tegra-for-5.10-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
soc/tegra: pmc: Add Tegra234 support
soc/tegra: pmc: Reorder reset sources/levels definitions
soc/tegra: misc: Add Tegra234 support
soc/tegra: fuse: Add Tegra234 support
soc/tegra: fuse: Implement tegra_is_silicon()
soc/tegra: fuse: Extract tegra_get_platform()
Link: https://lore.kernel.org/r/20200918150303.3938852-2-thierry.reding@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
Uses cdev_device_add() instead of the cdev_add() device_add()
combination.
Initializes dev->groups instead of direct calls to sysfs_create_group()
and friends.
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Merge tag 'tee-dev-cleanup-for-v5.10' of git://git.linaro.org:/people/jens.wiklander/linux-tee into arm/drivers
Simplify tee_device_register() and friends
Uses cdev_device_add() instead of the cdev_add() device_add()
combination.
Initializes dev->groups instead of direct calls to sysfs_create_group()
and friends.
* tag 'tee-dev-cleanup-for-v5.10' of git://git.linaro.org:/people/jens.wiklander/linux-tee:
tee: avoid explicit sysfs_create/delete_group by initialising dev->groups
tee: replace cdev_add + device_add with cdev_device_add
Link: https://lore.kernel.org/r/20200918144130.GB1219771@jade
Signed-off-by: Olof Johansson <olof@lixom.net>
- Add core support for the R-Car V3U (R8A779A0) SoC, including System
Controller (SYSC) and Reset (RST) support,
- Various Kconfig cleanups.
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Merge tag 'renesas-drivers-for-v5.10-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/drivers
Renesas driver updates for v5.10 (take two)
- Add core support for the R-Car V3U (R8A779A0) SoC, including System
Controller (SYSC) and Reset (RST) support,
- Various Kconfig cleanups.
* tag 'renesas-drivers-for-v5.10-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
soc: renesas: r8a779a0-sysc: Add r8a779a0 support
soc: renesas: rcar-rst: Add support for R-Car V3U
soc: renesas: Identify R-Car V3U
soc: renesas: Sort driver description title
soc: renesas: Use ARM32/ARM64 for menu description
dt-bindings: clock: Add r8a779a0 CPG Core Clock Definitions
dt-bindings: power: Add r8a779a0 SYSC power domain definitions
Link: https://lore.kernel.org/r/20200918124800.15555-4-geert+renesas@glider.be
Signed-off-by: Olof Johansson <olof@lixom.net>
Fix smatch warning:
drivers/soc/fsl/qe/ucc.c:526
ucc_set_tdm_rxtx_clk() warn: unsigned 'tdm_num' is never less than zero.
'tdm_num' is u32 type, never less than zero.
Signed-off-by: Wang Hai <wanghai38@huawei.com>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
This addresses the following gcc warning with "make W=1":
drivers/soc/fsl/dpio/qbman-portal.c: In function
‘qbman_swp_enqueue_multiple_direct’:
drivers/soc/fsl/dpio/qbman-portal.c:650:11: warning: variable
‘addr_cena’ set but not used [-Wunused-but-set-variable]
650 | uint64_t addr_cena;
| ^~~~~~~~~
Reported-by: Hulk Robot <hulkci@huawei.com>
Signed-off-by: Jason Yan <yanaijie@huawei.com>
Reported-by: kernel test robot <lkp@intel.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
On error the function was meant to return -ERRNO. This also fixes
compile warning:
drivers/soc/fsl/qbman/bman.c:640:6: warning: variable 'err' set but not used [-Wunused-but-set-variable]
Fixes: 0505d00c8d ("soc/fsl/qbman: Cleanup buffer pools if BMan was initialized prior to bootup")
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
This fixes compile warnings from the -Wpacked-not-aligned option.
In file included from ../drivers/crypto/caam/qi.c:12:
../include/soc/fsl/qman.h:259:1: warning: alignment 1 of ‘struct qm_dqrr_entry’ is less than 8 [-Wpacked-not-aligned]
} __packed;
^
../include/soc/fsl/qman.h:292:2: warning: alignment 1 of ‘struct <anonymous>’ is less than 8 [-Wpacked-not-aligned]
} __packed ern;
^
Reported-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Li Yang <leoyang.li@nxp.com>
Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code.
Signed-off-by: Qinglang Miao <miaoqinglang@huawei.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Enable support for the BPMP on Tegra234 to avoid relying on Tegra194
being enabled to pull in the needed OF device ID table entry.
On simulation platforms the BPMP hasn't booted up yet by the time we
probe the BPMP driver and the BPMP hasn't had a chance to mark the
doorbell as ringable by the CCPLEX. This corresponding check in the
BPMP driver will therefore fail. Work around this by disabling the
check on simulation platforms.
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The PMC block is largely similar to that found on earlier chips, but
not completely compatible. Allow binding to the instantiation found on
Tegra234.
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Move the definitions of reset sources and levels into a more natural
location.
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
The MISC block is largely similar to that found on earlier chips, but
not completely compatible. Allow binding to the instantiation found on
Tegra234.
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add support for FUSE block found on the Tegra234 SoC, which is largely
similar to the IP found on previous generations.
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This function can be used by drivers to determine whether code is
running on silicon or on a simulation platform.
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This function extracts the PRE_SI_PLATFORM field from the HIDREV
register and can be used to determine which platform the kernel runs on
(silicon, simulation, ...). Note that while only Tegra194 and later
define this field, it should be safe to call this on prior generations
as well since this field should read as 0, indicating silicon.
Reviewed-by: Jon Hunter <jonathanh@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
If the dev->groups is initialised, the sysfs group is created as part
of device_add call. There is no need to call sysfs_create/delete_group
explicitly.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Commit 233ed09d7f ("chardev: add helper function to register char devs
with a struct device") added a helper function 'cdev_device_add'.
Make use of cdev_device_add in tee_device_register to replace cdev_add
and device_add. Since cdev_device_add takes care of setting the
kobj->parent, drop explicit initialisation in tee_device_alloc.
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
Add support for R-Car V3U (R8A779A0) SoC power areas and register
access, because register specification differs from R-Car Gen2/3.
Inspired by patches in the BSP by Tho Vu.
Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/1599810232-29035-5-git-send-email-yoshihiro.shimoda.uh@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
APR client incorrectly prints out "ret" variable on pdr_add_lookup failure,
it should be printing the error value returned by the lookup instead.
Fixes: 8347356626 ("soc: qcom: apr: Add avs/audio tracking functionality")
Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Link: https://lore.kernel.org/r/20200915154232.27523-1-sibis@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Couple of main additions: SCMI system protocol support and ability to
build SCMI driver as a single module which is needed by some transports
like virtio as they may not be ready early during the boot. This also
includes constification of scmi ops and related function pointers.
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Merge tag 'scmi-updates-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into arm/drivers
ARM SCMI updates for v5.10
Couple of main additions: SCMI system protocol support and ability to
build SCMI driver as a single module which is needed by some transports
like virtio as they may not be ready early during the boot. This also
includes constification of scmi ops and related function pointers.
* tag 'scmi-updates-5.10' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
firmware: arm_scmi: Enable building as a single module
firmware: arm_scmi: Move scmi protocols registration into the driver
firmware: arm_scmi: Move scmi bus init and exit calls into the driver
firmware: smccc: Export both smccc functions
firmware: arm_scmi: Fix NULL pointer dereference in mailbox_chan_free
firmware: arm_scmi: Add SCMI device for system power protocol
firmware: arm_scmi: Add system power protocol support
firmware: arm_scmi: Constify static scmi-ops
firmware: arm_scmi: Constify ops pointers in scmi_handle
cpufreq: arm_scmi: Constify scmi_perf_ops pointers
Link: https://lore.kernel.org/r/20200914075018.2rvytvghxyutcbk4@bogus
Signed-off-by: Olof Johansson <olof@lixom.net>
Now, with all the plumbing in place to enable building scmi as a module
instead of built-in modules, let us enable the same.
Link: https://lore.kernel.org/r/20200907195046.56615-5-sudeep.holla@arm.com
Tested-by: Cristian Marussi <cristian.marussi@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
In preparation to enable building SCMI as a single module, let us move
the SCMI protocol registration call into the driver. This enables us
to also add unregistration of the SCMI protocols.
The main reason for this is to keep it simple instead of maintaining
it as separate modules and dealing with all possible initcall races
and deferred probe handling. We can move it as separate modules if
needed in future.
Link: https://lore.kernel.org/r/20200907195046.56615-4-sudeep.holla@arm.com
Tested-by: Cristian Marussi <cristian.marussi@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
In preparation to enable building scmi as a single module, let us move
the scmi bus {de-,}initialisation call into the driver.
The main reason for this is to keep it simple instead of maintaining
it as separate modules and dealing with all possible initcall races
and deferred probe handling. We can move it as separate modules if
needed in future.
Link: https://lore.kernel.org/r/20200907195046.56615-3-sudeep.holla@arm.com
Tested-by: Cristian Marussi <cristian.marussi@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
We need to export both arm_smccc_1_1_get_conduit and arm_smccc_get_version
to allow several modules make use of them. Arm FFA, Arm SCMI and PTP
drivers are few drivers that are planning to use these functions.
Let us export them in preparation to add support for SCMI as module.
Link: https://lore.kernel.org/r/20200907195046.56615-2-sudeep.holla@arm.com
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
please pull the following:
- Alvaro adds support for the BCM63xx (DSL) SoCs power domain controller
and adds support for the 6318, 6328, 6362, 63268.
- Florian adds support for tuning the Bus Interface Unit on 72164 and
72165, enables the Brahma-B53 and Cortex-A72 read-ahead cache for the
64-bit capable ARCH_BRCMSTB platforms, and finally updates the GISB
driver to support breakpoint notifications.
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Merge tag 'arm-soc/for-5.10/drivers' of https://github.com/Broadcom/stblinux into arm/drivers
This pull request contains Broadcom SoCs drivers changes for 5.10,
please pull the following:
- Alvaro adds support for the BCM63xx (DSL) SoCs power domain controller
and adds support for the 6318, 6328, 6362, 63268.
- Florian adds support for tuning the Bus Interface Unit on 72164 and
72165, enables the Brahma-B53 and Cortex-A72 read-ahead cache for the
64-bit capable ARCH_BRCMSTB platforms, and finally updates the GISB
driver to support breakpoint notifications.
* tag 'arm-soc/for-5.10/drivers' of https://github.com/Broadcom/stblinux:
bus: brcmstb_gisb: Add support for breakpoint interrupts
dt-bindings: bus: Document breakpoint interrupt for gisb-arb
soc: bcm: brcmstb: biuctrl: Change RAC data line prefetching after 4 consecutive lines
soc: bcm: brcmstb: biuctrl: Change RAC prefetch distance from +/-1 to +/- 2
soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72165
soc: bcm: brcmstb: biuctrl: Tune MCP settings for 72164
MIPS: BMIPS: dts: add BCM63268 power domain support
MIPS: BMIPS: dts: add BCM6362 power domain support
MIPS: BMIPS: dts: add BCM6328 power domain support
soc: bcm: add BCM63xx power domain driver
MIPS: BMIPS: add BCM6318 power domain definitions
MIPS: BMIPS: add BCM63268 power domain definitions
MIPS: BMIPS: add BCM6362 power domain definitions
MIPS: BMIPS: add BCM6328 power domain definitions
dt-bindings: soc: brcm: add BCM63xx power domain binding
soc: bcm: brcmstb: biuctrl: Enable Read-ahead cache
bus: brcmstb_gisb: Shorten prints
Link: https://lore.kernel.org/r/20200912032153.1216354-3-f.fainelli@gmail.com
Signed-off-by: Olof Johansson <olof@lixom.net>
1. Fixes in several drivers for GCC warnings, including kerneldoc fixes
and issues discovered while compile testing.
2. Enable compile testing of most of the drivers.
3. Use dev_err_probe() to simplify the code.
4. omap-gpmc: fix off by one errors, code cleanups and improvements.
5. tegra: remove the GPU from DRM IOMMU group so it would use its own;
few minor fixes.
6. brcmstb_dpfe: fix memory leak and array index out of bounds.
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Merge tag 'memory-controller-drv-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into arm/drivers
Memory controller drivers for v5.10
1. Fixes in several drivers for GCC warnings, including kerneldoc fixes
and issues discovered while compile testing.
2. Enable compile testing of most of the drivers.
3. Use dev_err_probe() to simplify the code.
4. omap-gpmc: fix off by one errors, code cleanups and improvements.
5. tegra: remove the GPU from DRM IOMMU group so it would use its own;
few minor fixes.
6. brcmstb_dpfe: fix memory leak and array index out of bounds.
* tag 'memory-controller-drv-5.10' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl: (26 commits)
memory: fsl-corenet-cf: Fix handling of platform_get_irq() error
memory: omap-gpmc: Fix -Wunused-function warnings
memory: tegra: Remove GPU from DRM IOMMU group
memory: tegra186-emc: Simplify with dev_err_probe()
memory: brcmstb_dpfe: Simplify with dev_err_probe()
memory: samsung: exynos5422-dmc: add missing and fix kerneldoc
memory: samsung: exynos5422-dmc: remove unused exynos5_dmc members
memory: samsung: exynos5422-dmc: rename timing register fields variables
memory: emif: Remove bogus debugfs error handling
memory: omap-gpmc: Fix build error without CONFIG_OF
memory: omap-gpmc: Fix a couple off by ones
memory: brcmstb_dpfe: fix array index out of bounds
memory: brcmstb_dpfe: Fix memory leak
memory: tegra: Correct shift value of apew
memory: Enable compile testing for most of the drivers
memory: brcmstb_dpfe: add separate entry for compile test
memory: tegra: tegra210-emc: fix indentation
memory: renesas-rpc-if: simplify with PTR_ERR_OR_ZERO
memory: omap-gpmc: consistently use !res for NULL checks
memory: omap-gpmc: use WARN() instead of BUG() on wrong free
...
Link: https://lore.kernel.org/r/20200907150611.11267-1-krzk@kernel.org
Signed-off-by: Olof Johansson <olof@lixom.net>
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Merge tag 'optee-i2c-fix-for-v5.10' of git://git.linaro.org:/people/jens.wiklander/linux-tee into arm/drivers
Make sure I2C functions used in OP-TEE are reachable with IS_REACHABLE()
* tag 'optee-i2c-fix-for-v5.10' of git://git.linaro.org:/people/jens.wiklander/linux-tee:
drivers: optee: fix i2c build issue
Link: https://lore.kernel.org/r/20200901101806.GA3286324@jade
Signed-off-by: Olof Johansson <olof@lixom.net>
Should not register power domain that not owned by current
partition.
Alought power domains will not be registered when power on failure,
we have to let CPU waste more cycles.
Whether power on or owned check, both need communicate with SCU,
but with owned check, we no need to run more code path to save CPU
cycles.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Reviewed-by: Leonard Crestez <leonard.crestez@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The original commit mixed up the forward and completion ring IDs for the
rx flow configuration.
Acked-by: Vinod Koul <vkoul@kernel.org>
Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com>
Fixes: 4927b1ab20 ("dmaengine: ti: k3-udma: Switch to k3_ringacc_request_rings_pair")
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
The IEPCLK_MUX is present on all SoCs whereas the CORECLK_MUX is present
only on AM65x SoCs and J721E. Add support for both these CLK muxes.
This allows the clock rates and clock parents for these to be controlled
through DT leveraging the clk infrastructure for configuring the default
parents and rates.
Signed-off-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
ICSS/ICSSG modules have an IEP clock mux that allow selection of
internal IEP clock from 2 clock sources.
ICSSG module has a CORE clock mux that allows selection of internal CORE
clock from 2 clock sources.
Add binding information for these 2 clock muxes.
Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
If a clock is disabled, its frequency should be allowed to change as
it is no longer in use. Add a flag towards this to the firmware clock
API handler routines.
Acked-by: Nishanth Menon <nm@ti.com>
Tested-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
Current implementation of the genpd support over TI SCI uses a single
genpd across the whole SoC, and attaches multiple devices to this. This
solution has its drawbacks, like it is currently impossible to attach
more than one power domain to a device; the core genpd implementation
requires one genpd per power-domain entry in DT for a single device.
Also, some devices like USB apparently require their own genpd during
probe time, the current shared approach in use does not work at all.
Switch the implementation over to use a single genpd per power domain
entry in DT. The domains are registered with the onecell approach, but
we also add our own xlate service due to recent introduction of the
extended flag for TI SCI PM domains; genpd core xlate service requires
a single cell per powerdomain, but we are using two cells.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
The K3 J721E family of SoCs have a revised version of the PRU-ICSS (ICSSG)
processor subsystem present on K3 AM65x SoCs. These SoCs contain typically
two ICSSG instances named ICSSG0 and ICSSG1. The two ICSSGs are identical
to each other for the most part with minor SoC integration differences and
capabilities. The ICSSG1 supports slightly enhanced features like SGMII
mode Ethernet, while the ICSSG0 instance is limited to MII mode only.
There is no change in the Interrupt Controller w.r.t AM65x. All other
integration aspects are very similar to the ICSSGs on AM65x SoCs.
The existing pruss platform driver has been updated to support these new
ICSSG instances through new J721E specific compatibles.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
The K3 AM65x family of SoCs have the next generation of the PRU-ICSS
processor subsystem capable of supporting Gigabit Ethernet, and is
commonly referred to as ICSSG. These SoCs contain typically three
ICSSG instances named ICSSG0, ICSSG1 and ICSSG2. The three ICSSGs are
identical to each other for the most part with minor SoC integration
differences and capabilities. The ICSSG2 supports slightly enhanced
features like SGMII mode Ethernet, while the ICSS0 and ICSSG1 instances
are limited to MII mode only.
The ICSSGs on K3 AM65x SoCs are in general super-sets of the PRUSS on the
AM57xx/66AK2G SoCs. They include two additional auxiliary PRU cores called
RTUs and few other additional sub-modules. The interrupt integration is
also different on the K3 AM65x SoCs and are propagated through various
SoC-level Interrupt Router and Interrupt Aggregator blocks. Other IP level
differences include different constant tables, differences in system event
interrupt input sources etc. They also do not have a programmable module
reset line like those present on AM33xx/AM43xx SoCs. The modules are reset
just like any other IP with the SoC's global cold/warm resets.
The existing pruss platform driver has been updated to support these new
ICSSG instances through new AM65x specific compatibles. A build dependency
with ARCH_K3 is added to enable building all the existing PRUSS platform
drivers for this ARMv8 platform.
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
The 66AK2G SoC supports two PRU-ICSS instances, named PRUSS0 and PRUSS1,
each of which has two PRU processor cores. The two PRU-ICSS instances
are identical to each other with few minor SoC integration differences,
and are very similar to the PRU-ICSS1 of AM57xx/AM43xx. The Shared Data
RAM size is larger and the number of interrupts coming into MPU INTC
is like the instances on AM437x. There are also few other differences
attributing to integration in Keystone architecture (like no SYSCFG
register or PRCM handshake protocols). Other IP level differences
include different constant table, differences in system event interrupt
input sources etc. They also do not have a programmable module reset
line like those present on AM33xx/AM43xx SoCs. The modules are reset
just like any other IP with the SoC's global cold/warm resets.
The existing PRUSS platform driver has been enhanced to support these
66AK2G PRU-ICSS instances through new 66AK2G specific compatible for
properly probing and booting all the different PRU cores in each
PRU-ICSS processor subsystem. A build dependency with ARCH_KEYSTONE
is added to enable the driver to be built in K2G-only configuration.
Signed-off-by: Andrew F. Davis <afd@ti.com>
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
The AM57xx family of SoCs supports two PRU-ICSS instances, each of
which has two PRU processor cores. The two PRU-ICSS instances are
identical to each other, and are very similar to the PRU-ICSS1 of
AM33xx/AM43xx except for a few minor differences like the RAM sizes
and the number of interrupts coming into the MPU INTC. They do
not have a programmable module reset line unlike those present on
AM33xx/AM43xx SoCs. The modules are reset just like any other IP
with the SoC's global cold/warm resets. Each PRU-ICSS's INTC is also
preceded by a Crossbar that enables multiple external events to be
routed to a specific number of input interrupt events. Any interrupt
event directed towards PRUSS needs this crossbar to be setup properly
on the firmware side.
The existing PRUSS platform driver has been enhanced to support
these AM57xx PRU-ICSS instances through new AM57xx specific
compatible for properly probing and booting all the different PRU
cores in each PRU-ICSS processor subsystem. A build dependency with
SOC_DRA7XX is also added to enable the driver to be built in
AM57xx-only configuration (there is no separate Kconfig option
for AM57xx vs DRA7xx).
Signed-off-by: Suman Anna <s-anna@ti.com>
Signed-off-by: Grzegorz Jaszczyk <grzegorz.jaszczyk@linaro.org>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@oracle.com>
