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MIPS: pte_special()/pte_mkspecial() support
Add support for pte_special() & pte_mkspecial(), replacing our previous stubs with functional implementations. Signed-off-by: Dmitry Korotin <dkorotin@wavecomp.com> [paul.burton@mips.com: - Fix for CONFIG_PHYS_ADDR_T_64BIT && CONFIG_CPU_MIPS32. - Rewrite commit message.] Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: linux-mips@vger.kernel.org
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@ -82,6 +82,7 @@ config MIPS
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select RTC_LIB
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select SYSCTL_EXCEPTION_TRACE
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select VIRT_TO_BUS
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select ARCH_HAS_PTE_SPECIAL
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menu "Machine selection"
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@ -52,6 +52,7 @@ enum pgtable_bits {
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_PAGE_WRITE_SHIFT,
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_PAGE_ACCESSED_SHIFT,
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_PAGE_MODIFIED_SHIFT,
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_PAGE_SPECIAL_SHIFT,
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};
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/*
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@ -78,6 +79,7 @@ enum pgtable_bits {
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_PAGE_WRITE_SHIFT,
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_PAGE_ACCESSED_SHIFT,
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_PAGE_MODIFIED_SHIFT,
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_PAGE_SPECIAL_SHIFT,
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};
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#elif defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
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@ -90,6 +92,7 @@ enum pgtable_bits {
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_PAGE_WRITE_SHIFT,
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_PAGE_ACCESSED_SHIFT,
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_PAGE_MODIFIED_SHIFT,
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_PAGE_SPECIAL_SHIFT,
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/* Used by TLB hardware (placed in EntryLo) */
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_PAGE_GLOBAL_SHIFT = 8,
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@ -113,6 +116,7 @@ enum pgtable_bits {
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#if defined(CONFIG_MIPS_HUGE_TLB_SUPPORT)
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_PAGE_HUGE_SHIFT,
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#endif
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_PAGE_SPECIAL_SHIFT,
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/* Used by TLB hardware (placed in EntryLo*) */
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#if defined(CONFIG_CPU_HAS_RIXI)
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@ -135,6 +139,7 @@ enum pgtable_bits {
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#if defined(CONFIG_MIPS_HUGE_TLB_SUPPORT)
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# define _PAGE_HUGE (1 << _PAGE_HUGE_SHIFT)
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#endif
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#define _PAGE_SPECIAL (1 << _PAGE_SPECIAL_SHIFT)
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/* Used by TLB hardware (placed in EntryLo*) */
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#if defined(CONFIG_XPA)
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@ -277,6 +277,7 @@ extern pgd_t swapper_pg_dir[];
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static inline int pte_write(pte_t pte) { return pte.pte_low & _PAGE_WRITE; }
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static inline int pte_dirty(pte_t pte) { return pte.pte_low & _PAGE_MODIFIED; }
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static inline int pte_young(pte_t pte) { return pte.pte_low & _PAGE_ACCESSED; }
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static inline int pte_special(pte_t pte) { return pte.pte_low & _PAGE_SPECIAL; }
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static inline pte_t pte_wrprotect(pte_t pte)
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{
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@ -337,10 +338,17 @@ static inline pte_t pte_mkyoung(pte_t pte)
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}
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return pte;
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}
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static inline pte_t pte_mkspecial(pte_t pte)
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{
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pte.pte_low |= _PAGE_SPECIAL;
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return pte;
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}
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#else
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static inline int pte_write(pte_t pte) { return pte_val(pte) & _PAGE_WRITE; }
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static inline int pte_dirty(pte_t pte) { return pte_val(pte) & _PAGE_MODIFIED; }
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static inline int pte_young(pte_t pte) { return pte_val(pte) & _PAGE_ACCESSED; }
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static inline int pte_special(pte_t pte) { return pte_val(pte) & _PAGE_SPECIAL; }
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static inline pte_t pte_wrprotect(pte_t pte)
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{
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@ -384,6 +392,12 @@ static inline pte_t pte_mkyoung(pte_t pte)
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return pte;
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}
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static inline pte_t pte_mkspecial(pte_t pte)
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{
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pte_val(pte) |= _PAGE_SPECIAL;
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return pte;
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}
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#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
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static inline int pte_huge(pte_t pte) { return pte_val(pte) & _PAGE_HUGE; }
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@ -394,8 +408,6 @@ static inline pte_t pte_mkhuge(pte_t pte)
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}
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#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
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#endif
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static inline int pte_special(pte_t pte) { return 0; }
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static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
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/*
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* Macro to make mark a page protection value as "uncacheable". Note
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