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MIPS: BMIPS: add clock controller nodes
Now that we have a driver for the clock controller, add nodes to allow devices to make use of it. Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: linux-clk@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-mips@vger.kernel.org Cc: Michael Turquette <mturquette@baylibre.com> Cc: Stephen Boyd <sboyd@kernel.org> Cc: Rob Herring <robh+dt@kernel.org> Cc: Mark Rutland <mark.rutland@arm.com> Cc: bcm-kernel-feedback-list@broadcom.com Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org>
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@ -51,16 +51,22 @@ ubus {
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compatible = "simple-bus";
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ranges;
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periph_cntl: syscon@fff8c000 {
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clkctl: clock-controller@fff8c004 {
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compatible = "brcm,bcm3368-clocks";
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reg = <0xfff8c004 0x4>;
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#clock-cells = <1>;
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};
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periph_cntl: syscon@fff8c008 {
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compatible = "syscon";
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reg = <0xfff8c000 0xc>;
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reg = <0xfff8c000 0x4>;
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native-endian;
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};
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reboot: syscon-reboot@fff8c008 {
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compatible = "syscon-reboot";
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regmap = <&periph_cntl>;
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offset = <0x8>;
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offset = <0x0>;
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mask = <0x1>;
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};
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@ -51,16 +51,22 @@ ubus {
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compatible = "simple-bus";
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ranges;
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periph_cntl: syscon@10000000 {
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clkctl: clock-controller@10000004 {
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compatible = "brcm,bcm63268-clocks";
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reg = <0x10000004 0x4>;
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#clock-cells = <1>;
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};
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periph_cntl: syscon@10000008 {
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compatible = "syscon";
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reg = <0x10000000 0x14>;
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reg = <0x10000000 0xc>;
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native-endian;
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};
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reboot: syscon-reboot@10000008 {
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compatible = "syscon-reboot";
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regmap = <&periph_cntl>;
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offset = <0x8>;
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offset = <0x0>;
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mask = <0x1>;
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};
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@ -51,6 +51,12 @@ ubus {
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compatible = "simple-bus";
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ranges;
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clkctl: clock-controller@10000004 {
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compatible = "brcm,bcm6328-clocks";
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reg = <0x10000004 0x4>;
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#clock-cells = <1>;
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};
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periph_intc: interrupt-controller@10000020 {
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compatible = "brcm,bcm6345-l1-intc";
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reg = <0x10000020 0x10>,
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@ -51,16 +51,22 @@ ubus {
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compatible = "simple-bus";
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ranges;
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periph_cntl: syscon@fffe0000 {
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clkctl: clock-controller@fffe0004 {
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compatible = "brcm,bcm6358-clocks";
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reg = <0xfffe0004 0x4>;
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#clock-cells = <1>;
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};
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periph_cntl: syscon@fffe0008 {
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compatible = "syscon";
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reg = <0xfffe0000 0xc>;
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reg = <0xfffe0000 0x4>;
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native-endian;
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};
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reboot: syscon-reboot@fffe0008 {
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compatible = "syscon-reboot";
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regmap = <&periph_cntl>;
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offset = <0x8>;
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offset = <0x0>;
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mask = <0x1>;
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};
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@ -51,16 +51,22 @@ ubus {
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compatible = "simple-bus";
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ranges;
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periph_cntl: syscon@10000000 {
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clkctl: clock-controller@10000004 {
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compatible = "brcm,bcm6362-clocks";
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reg = <0x10000004 0x4>;
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#clock-cells = <1>;
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};
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periph_cntl: syscon@10000008 {
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compatible = "syscon";
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reg = <0x10000000 0x14>;
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reg = <0x10000000 0xc>;
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native-endian;
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};
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reboot: syscon-reboot@10000008 {
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compatible = "syscon-reboot";
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regmap = <&periph_cntl>;
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offset = <0x8>;
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offset = <0x0>;
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mask = <0x1>;
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};
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@ -51,16 +51,22 @@ ubus {
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compatible = "simple-bus";
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ranges;
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periph_cntl: syscon@10000000 {
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clkctl: clock-controller@10000004 {
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compatible = "brcm,bcm6368-clocks";
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reg = <0x10000004 0x4>;
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#clock-cells = <1>;
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};
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periph_cntl: syscon@100000008 {
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compatible = "syscon";
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reg = <0x10000000 0x14>;
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reg = <0x10000000 0xc>;
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native-endian;
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};
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reboot: syscon-reboot@10000008 {
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compatible = "syscon-reboot";
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regmap = <&periph_cntl>;
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offset = <0x8>;
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offset = <0x0>;
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mask = <0x1>;
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};
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