Jessica Clarke 28aaa58fa6 fu740_pci_dw: Fix PERST delay and keep asserted for rest of reset sequence ... DELAY takes microseconds not milliseconds, so 100 was too low. Moreover, when enabling hw.pci.clear_pcib, PCI emeration would still stop at one of the first bridges, but by asserting PERST for the rest of the reset sequence that appears to be reliably addressed. Fixes: 896e217a0e ("fu740_pci_dw: Add SiFive FU740 PCIe controller driver")		2024-06-02 21:42:18 +01:00
..
fe310_aon.c
files.sifive
fu740_pci_dw.c	fu740_pci_dw: Fix PERST delay and keep asserted for rest of reset sequence	2024-06-02 21:42:18 +01:00
sifive_gpio.c
sifive_prci.c
sifive_spi.c
sifive_uart.c