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fu740_pci_dw: Fix PERST delay and keep asserted for rest of reset sequence
DELAY takes microseconds not milliseconds, so 100 was too low. Moreover,
when enabling hw.pci.clear_pcib, PCI emeration would still stop at one
of the first bridges, but by asserting PERST for the rest of the reset
sequence that appears to be reliably addressed.
Fixes: 896e217a0e
("fu740_pci_dw: Add SiFive FU740 PCIe controller driver")
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@ -215,12 +215,6 @@ fupci_phy_init(struct fupci_softc *sc)
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return (error);
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}
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/* Hold PERST for 100ms as per the PCIe spec */
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DELAY(100);
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/* Deassert PERST_N */
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FUDW_MGMT_WRITE(sc, FUDW_MGMT_PERST_N, 1);
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/* Deassert core power-on reset (active low) */
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error = gpio_pin_set_active(sc->porst_pin, true);
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if (error != 0) {
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@ -280,6 +274,12 @@ fupci_phy_init(struct fupci_softc *sc)
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/* Put the controller in Root Complex mode */
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FUDW_MGMT_WRITE(sc, FUDW_MGMT_DEVICE_TYPE, FUDW_MGMT_DEVICE_TYPE_RC);
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/* Hold PERST for 100ms as per the PCIe spec */
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DELAY(100000);
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/* Deassert PERST_N */
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FUDW_MGMT_WRITE(sc, FUDW_MGMT_PERST_N, 1);
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return (0);
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}
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