Commit graph

525 commits

Author SHA1 Message Date
Mitchell Horne 3933ff56f9 busdma: tidy bus_dma_run_filter() functions
After removing filter functionality, the naming doesn't clearly
represent what the function does, so try to address this. Include some
code clarity and style improvements.

Create a common version in subr_busdma_bounce.c, used by most
implementations. powerpc still needs its own version of the function,
due to its dmat->iommu == NULL check.

No functional change intended.

Reviewed by:	jhb
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D42896
2023-12-06 19:11:39 -04:00
Mitchell Horne 1228b93b41 busdma: remove parent tag tracking
Without filter functions, we do not need to keep track of tag ancestry.
All inheritance of the parent tag's parameters occurs when creating the
new child tag.

Reviewed by:	jhb
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D42895
2023-12-06 19:11:39 -04:00
Mitchell Horne 900907f439 busdma: kill filter functionality internally
Address filter functions are unused, unsupported, and now rejected.
Simplify some busdma code by removing filter functionality completely.

Note that the chains of parent tags become useless, and will be cleaned
up in the next commit.

No functional change intended.

Reviewed by:	jhb
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D42894
2023-12-06 19:11:39 -04:00
Jessica Clarke 9560ac4b63 armv8rng: Don't require toolchain to support FEAT_RNG
We have the mechanism in place to support encoding system registers
explicitly, so use that rather than requiring LLVM 13+, which breaks our
current set of GitHub CI builds.

Fixes:	9eecef0521 ("Add an Armv8 rndr random number provider")
2023-12-01 23:59:07 +00:00
Mark Johnston 4f12883c36 arm64: Add register definitions for MDCR_EL2
This is needed to support the bhyve gdb stub implementation on arm64.

Reviewed by:	andrew
MFC after:	1 week
Sponsored by:	Innovate UK
Differential Revision:	https://reviews.freebsd.org/D42867
2023-12-01 13:31:13 -05:00
John Baldwin 1587a9db92 pci_cfgreg: Add a PCI domain argument to the low-level register API
This commit changes the API of pci_cfgreg(read|write) to add a domain
argument (referred to as a segment in ACPI parlance) (note that this
is not the same as a NUMA domain, but something PCI-specific).  This
does not yet enable access to domains other than 0, but updates the
API to support domains.

Places that use hard-coded bus/slot/function addresses have been
updated to hardcode a domain of 0.  A few places that have the PCI
domain (segment) available such as the acpi_pcib_acpi.c Host-PCI
bridge driver pass the PCI domain.

The hpt27xx(4) and hptnr(4) drivers fail to attach to a device not on
domain 0 since they provide APIs to their binary blobs that only
permit bus/slot/function addressing.

The x86 non-ACPI PCI bus drivers all hardcode a domain of 0 as they do
not support multiple domains.

Reviewed by:	imp
Differential Revision:	https://reviews.freebsd.org/D42827
2023-11-29 10:31:47 -08:00
Warner Losh 29363fb446 sys: Remove ancient SCCS tags.
Remove ancient SCCS tags from the tree, automated scripting, with two
minor fixup to keep things compiling. All the common forms in the tree
were removed with a perl script.

Sponsored by:		Netflix
2023-11-26 22:23:30 -07:00
Kyle Evans a3ceeef26b arm64: lop off another 24MB of KVA for early device mappings
This grows the block enough to fit a 4K 32-bit depth framebuffer; some
firmware would present smaller GOP modes to be able to boot with a
smaller framebuffer on these devices, but the Windows Devkit firmware
is simply not that nice.  Instead, it offers exactly one GOP mode that
matches the current resolution of the attached display, so with limited
control over resolution on most of my displays it'd be nice if we could
Just Work(TM) at 4K.

andrew notes that he has some ideas for removing PMAP_MAPDEV_EARLY_SIZE
entirely, so this limitation could end up removed altogether in the
future.

Reviewed by:	andrew, emaste
Differential Revision:	https://reviews.freebsd.org/D42726
2023-11-23 10:23:14 -06:00
Andrew Turner 1b9096cd1d arm64: Set the Guarded Page flag in the kernel
Now the kernel and modules are built with branch protection we can
enablethe Guarded Page flag in the page tables. This causes indirect
branches to a location without a correct landing pad instruction to
raise an exception.

This should help mitigate some attacks where a function pointer is
changed to point somewhere other than the start of the function,
however it doesn't stop an attacker pointing it to an unintended
function.

Reviewed by:	alc, scottph (both earlier version), markj
Sponsored by:	Arm Ltd
Sponsored by:	The FreeBSD Foundation (earlier version)
Differential Revision:	https://reviews.freebsd.org/D42080
2023-11-21 10:02:58 +00:00
Andrew Turner ba31362694 arm64: Make kern_delta unneeded in the boot params
Use pmap_early_vtophys to translate from a virtual to physical where
we were previously using the calculated delta. This means that, while
we still calculate it, we don't need to pass it to initarm or either
pmap bootstrap functions.

While here remove an unneeded printf that indirectly used it or was
related to the previous printf.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D42567
2023-11-15 18:05:08 +00:00
Andrew Turner 5fae53589e arm64: Use pmap_early_vtophys in pmap_bootstrap_san
Use pmap_early_vtophys to find the physical address of the kernel base
rather than using the calculated offset as it will be removed in a
latter commit.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D42566
2023-11-15 18:05:08 +00:00
Warner Losh 49025a1109 _bus.h: Use standard licnese text
All of these used the 'immediately at beginning' variation of the
BSD-2-Clause license. This wasn't intentional, just what I copied from
from a random file in the tree back in 2005. It was not an intentional
decision.

The different arch bus.h files are a mix of BSD-2-Clause and
BSD-4-Clause that have various copyright holders (Charles M. Hannum,
Christopher G. Demetriou, The NetBSD Foundation and KATO Takenori), and
some of the content of these files were likely copied from there.
However, apart from the uncopyrightable interface lines, there are very
few comments. It's unclear if these comments are 'original material'
here to copyright, but to the extent that there is, license it under the
standard BSD-2-Clause copyright that's the norm for the project today.
In any event, the standard BSD-2-Clause is also closer to those
originals.

In addition, FreeBSD uses different type definitions than the original
NetBSD code in part. The comments that were copied have been copied a
lot, but appear in NetBSD's bus.h files in NetBSD 1.3.

While I'm here, assign the copyright, to the extent any exists from me,
to the FreeBSD Foundation. I just cut and pasted these into _bus.h from
the different machine files and those files have a rich history of
modification from the original imports from NetBSD over more than 25
years so it's tricky to say who, exactly, wrote each bit. Given the size
of the files, this seems like the best compromise.  Also add an
acknowledgement to the NetBSD 1.3 bus.h files and their authors (there
were no additional FreeBSD authors listed in the various
sys/*/include/bus.h files). Finally, use the SPDX identifier instead of
multiple copies of the text.

Differential Revision:	https://reviews.freebsd.org/D42532
Sponsored by:		Netflix
2023-11-13 12:25:30 -07:00
Andrew Turner 2ee649c1dd arm64: Add more HWCAP2 values
Update the HWCAP2 values to align with Linux v6.6-rc7

Reviewed by:	manu, imp, emaste
Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D42379
2023-11-10 16:01:13 +00:00
Andrew Turner 0f09388009 arm64: Expand HWCAP2 to be 64 bit
There are more than 32 arm64 HWCAP2 values. Expand the macros to
include leading zeros and mark them as unsigned long.

Reviewed by:	manu, imp, emaste
Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D42378
2023-11-10 16:01:13 +00:00
Andrew Turner e6dbc99d47 arm64: Create a Linux view of the ID registers
When adding support for new hardware extensions we may not want to
enable support for the FreeBSD and Linux ABIs at the same time. To
support this split the Linux ID register and hwcaps so they can be
configured separately.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D42372
2023-11-10 16:01:13 +00:00
Andrew Turner 0590ed0967 arm64: Add a BTI landing pad to .mcount
The .mcount function needs a BTI branch target. As we can't rely on
asm.h being included use the hint version of a "bti c" instruction.
This is a nop when BTI is not supported or not used.

Reviewed by:	markj
Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D42230
2023-10-30 17:55:45 +00:00
Andrew Turner 2b39a6f68c arm64: Add PAC instruction macros
To support Pointer Authentication (PAC) in assembly files add a pair of
macros that sign the link register. When used before storing to the
stack it will allow hardware to detect if it has changed before using
it in the return instruction.

Reviewed by:	markj, emaste
Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D42226
2023-10-20 17:01:05 +01:00
Andrew Turner 82597d2102 arm64: Support creating a BTI & PAC note
To detect when an object file is build with the Branch Target
Identification (BTI) and Pointer Authentication Code (PAC) extensions
there is an elf note the compiler will insert. It will only do so from
a high level language, e.g. C or C++.

To get the not in assembly add the GNU_PROPERTY_AARCH64_FEATURE_1_NOTE
macro that can be used to create it, and the
GNU_PROPERTY_AARCH64_FEATURE_1_VAL macro to insert the correct value
based on which combination of BTI and PAC are enabled.

Reviewed by:	markj (earlier version), emaste
Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D42225
2023-10-20 16:59:25 +01:00
Andrew Turner e340882d3e arm64: Add BTI landing pads to assembly functions
When we enable BTI iboth the first instruction in a function that could
be called indirectly, and a branch within a function need a valid
landing pad instruction.

There are three options for these instructions:
 1. A breakpoint instruction
 2. A pointer authentication PACIASP/PACIBSP
 3. A BTI instruction

Option 1 will raise a breakpoint exception so isn't useable in either
cases. Option 2 could be used in some function entry cases, but needs
to be paired with an authentication instruction, and is normally only
used in non-leaf functions we can't use it in this case. This leaves
option 3.

There are four variants of the instruction, the C variant is used on
function entry and the J variant is for jumping within a function.
There is also a JC that works with both and one with no target that
works with neither.

Reviewed by:	markj
Sponsored by:	Arm Ltd
Sponsored by:	The FreeBSD Foundation (earlier version)
Differential Revision:	https://reviews.freebsd.org/D42078
2023-10-10 10:52:16 +01:00
Andrew Turner 450f731b7f Add BTI exceptions
We could hit these when executing code marked as using BTI but jumps
to a non-branch target instruction.

Sponsored by:	Arm Ltd
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D39450
2023-09-22 18:15:14 +01:00
Andrew Turner a35e47369f arm64: Add TCR register masks
These will be used by bhyve to implement page table walking.

Sponsored by:	Arm Ltd
2023-09-08 14:31:26 +01:00
Andrew Turner aea5405389 arm64: Fix the TCR_TBI0 macro to use UL
This needs to be 1UL to ensure the type is large enough for the shift.

Sponsored by:	Arm Ltd
2023-09-08 14:31:25 +01:00
Andrew Turner 8f26d01f53 arm64: Fix the TCR_EPD0 definition
Sponsored by:	Arm Ltd
2023-09-06 18:32:49 +01:00
Mitchell Horne c190fb35f3 pmc: better distinguish pmu-events allocation path
Background:

The pm_ev field of struct pmc_op_pmcallocate and struct pmc
traditionally contains the index of the chosen event, corresponding to
the __PMC_EVENTS array in pmc_events.h. This is a static list of events,
maintained by FreeBSD.

In the usual case, libpmc translates the user supplied event name
(string) into the pm_ev index, which is passed as an argument to the
allocation syscall. On the kernel side, the allocation method for the
relevant hwpmc class translates the given index into the event code that
will be written to an event selection register.

In 2018, a new source of performance event definitions was introduced:
the pmu-events json files, which are maintained by the Linux kernel. The
result was better coverage for newer Intel processors with a reduced
maintenance burden for libpmc/hwpmc. Intel and AMD CPUs were
unconditionally switched to allocate events from pmu-events instead of
the traditional scheme (959826ca1b, 81eb4dcf9e).

Under the pmu-events scheme, the pm_ev field contains an index
corresponding to the selected event from the pmu-events table, something
which the kernel has no knowledge of. The configuration for the
performance counting registers is instead passed via class-dependent
fields (struct pmc_md_op_pmcallocate).

In 2021 I changed the allocation logic so that it would attempt to
pull from the pmu-events table first, and fall-back to the traditional
method (dfb4fb4116). Later, pmu-events support for arm64 and power8
CPUs was added (28dd6730a5 and b48a2770d4).

The problem that remains is that the pm_ev field is overloaded, without
a definitive way to determine whether the event allocation came from the
pmu-events table or FreeBSD's statically-defined PMC events. This
resulted in a recent fix, 21f7397a61.

Change:

To disambiguate these two supported but separate use-cases, add a new
flag, PMC_F_EV_PMU, to be set as part of the allocation, indicating that
the event index came from pmu-events.

This is useful in two ways:
 1. On the kernel side, we can validate the syscall arguments better.
    Some classes support only the traditional event scheme (e.g.
    hwpmc_armv7), while others support only the pmu-events method (e.g.
    hwpmc_core for Intel). We can now check for this. The hwpmc_arm64
    class supports both methods, so the new flag supersedes the existing
    MD flag, PM_MD_EVENT_RAW.

 2. The flag will be tracked in struct pmc for the duration of its
    lifetime, meaning it is communicated back to userspace. This allows
    libpmc to perform the reverse index-to-event-name translation
    without speculating about the meaning of the index value.

Adding the flag is a backwards-incompatible ABI change. We recently
bumped the major version of the hwpmc module, so this breakage is
acceptable.

Reviewed by:	jkoshy
MFC after:	3 days
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D40753
2023-09-03 13:27:21 -07:00
Konstantin Belousov 8882b7852a add pmap_active_cpus()
For amd64, i386, arm, and riscv, i.e. all architectures except arm64,
the custom implementation is provided since we maintain the bitmask of
active CPUs anyway.

Arm64 uses somewhat naive iteration over CPUs and match current vmspace'
pmap with the argument. It is not guaranteed that vmspace->pmap is the
same as the active pmap, but the inaccuracy should be toleratable.

Sponsored by:	The FreeBSD Foundation
MFC after:	1 week
Differential revision:	https://reviews.freebsd.org/D32360
2023-08-23 03:02:21 +03:00
Warner Losh 71625ec9ad sys: Remove $FreeBSD$: one-line .c comment pattern
Remove /^/[*/]\s*\$FreeBSD\$.*\n/
2023-08-16 11:54:24 -06:00
Warner Losh 2ff63af9b8 sys: Remove $FreeBSD$: one-line .h pattern
Remove /^\s*\*+\s*\$FreeBSD\$.*$\n/
2023-08-16 11:54:18 -06:00
Warner Losh 95ee2897e9 sys: Remove $FreeBSD$: two-line .h pattern
Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/
2023-08-16 11:54:11 -06:00
Ed Maste e0c6e89108 arm64: increase MAXCPU to 1024, following amd64
As in commit 9051987e40 for amd64, support up to 1024 CPU cores.
arm64 hardware with more than 256 CPU cores is currently available and
will become increasingly common over FreeBSD 14's lifetime.

PR:		269572
Reviewed by:	andrew
Relnotes:	Yes
Sponsored by:	The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D41319
2023-08-15 08:22:02 -04:00
Mark Johnston dd24d475d5 arm64: Add constants for decoding ISS fields for WF* exceptions
WFI and WFIT trap to EL2 when executed in a vmm guest.  (Currently
WFE/WFET are not configured to trap.)  We only handle WFI at the moment,
so these constants are useful when handling the exception.

Reviewed by:	andrew
MFC after:	1 week
Sponsored by:	Innovate UK
Differential Revision:	https://reviews.freebsd.org/D41199
2023-07-28 09:34:38 -04:00
Andrew Turner 53e1af5a10 arm64: Decode the ID_AA64PFR2_EL1 register
No fields have been defined, but it has been documented in the
Architecture Reference Manual.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D40897
2023-07-28 12:53:02 +01:00
Andrew Turner 8c111e5b37 arm64: Update the ID_AA64PFR1_EL1 fields
While here move to decimal for the _op and _CR definitions to be used
by a future macro to define the register when the assembler doesn't
know about it.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D40896
2023-07-28 12:53:02 +01:00
Andrew Turner 0766dde9b5 arm64: Update the ID_AA64PFR0_EL1 fields
While here move to decimal for the _op and _CR definitions to be used
by a future macro to define the register when the assembler doesn't
know about it.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D40895
2023-07-28 12:53:02 +01:00
Andrew Turner 22235b631b arm64: Decode the ID_AA64MMFR4_EL1 register
No fields have been defined, but it has been documented in the
Architecture Reference Manual.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D40894
2023-07-28 12:53:02 +01:00
Andrew Turner c65679143f arm64: Decode the ID_AA64MMFR3_EL1 register
Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D40893
2023-07-28 12:53:02 +01:00
Andrew Turner 2134cfe793 arm64: Don't use hex for ID_AA64MMFR2_EL1_op/CR*
It breaks a future macro that creates the alternative register name
for old compilers.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D40892
2023-07-28 12:53:02 +01:00
Andrew Turner 284f91de8b arm64: Update the ID_AA64MMFR1_EL1 fields
Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D40891
2023-07-28 12:53:01 +01:00
Andrew Turner b21402d058 arm64: Update the ID_AA64MMFR0_EL1 fields
While here move to decimal for the _op and _CR definitions to be used
by a future macro to define the register when the assembler doesn't
know about it.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D40890
2023-07-28 12:53:01 +01:00
Andrew Turner de01309926 arm64: Update the ID_AA64ISAR1_EL1 fields
While here move to decimal for the _op and _CR definitions to be used
by a future macro to define the register when the assembler doesn't
know about it.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D40889
2023-07-28 12:53:01 +01:00
Andrew Turner 4182f58172 arm64: Update the ID_AA64ISAR0_EL1 fields
While here move to decimal for the _op and _CR definitions to be used
by a future macro to define the register when the assembler doesn't
know about it.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D40888
2023-07-28 12:53:01 +01:00
Andrew Turner 6fd44e5f53 arm64: Update the ID_AA64DFR0_EL1 fields
While here move to decimal for the _op and _CR definitions to be used
by a future macro to define the register when the assembler doesn't
know about it.

Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D40887
2023-07-28 12:53:01 +01:00
Mark Johnston 1083a8cd85 pcpu: Remove unused definitions of ALT_STACK_SIZE
This was added originally for the sparc64 port and apparently copied to
other platforms.  No functional change intended.

MFC after:	1 week
2023-07-27 16:02:03 -04:00
Mike Karels d5d97bed4a arm64 lib32: prepare arm64 headers to redirect to arm
In order to compile lib32 libraries and other 32-bit code on arm64,
<machine/foo.h> needs to be redirected to an arm header rather
than arm64 when building with -m32.  Ifdef the arm64 headers that
are installed in /usr/include/machine and used by user-level software
(including references from /usr/include/*.h) so that if __arm__ is
defined when including the arm64 version, <arm/foo.h> is included
rather than using the rest of the file's contents.  Some arm headers
had no arm64 equivalent; headers were added just to do the redirection.
These files use #error if __arm__ is not defined to guard against
confusion.  Also add an include/arm Makefile, and modify Makefiles
as needed to install everything, including the arm files in
/usr/include/arm.  fenv.h comes from lib/msun/arm/fenv.h.

The new arm64 headers are:
    acle-compat.h
    cpuinfo.h
    sysreg.h

Reviewed by:	jrtc27, imp
Differential Revision:	https://reviews.freebsd.org/D40944
2023-07-25 18:59:26 -05:00
Mitchell Horne a89262079e Consistently provide ffs/fls using builtins
Use of compiler builtin ffs/ctz functions will result in optimized
instruction sequences when possible, and fall back to calling a function
provided by the compiler run-time library. We have slowly shifted our
platforms to take advantage of these builtins in 60645781d6 (arm64),
1c76d3a9fb (arm), 9e319462a0 (powerpc, partial).

Some platforms still rely on the libkern implementations of these
functions provided by libkern, namely riscv, powerpc (ffs*, flsll), and
i386 (ffsll and flsll). These routines are slow, as they perform a
linear search for the bit in question. Even on platforms lacking
dedicated bit-search instructions, such as riscv, the compiler library
will provide better-optimized routines, e.g. by using binary search.

Consolidate all definitions of these functions (whether currently using
builtins or not) to libkern.h. This should result in equivalent or
better performing routines in all cases.

One wart in all of this is the existing HAVE_INLINE_F*** macros, which
we use in a few places to conditionally avoid the slow libkern routines.
These aren't easily removed in one commit. For now, provide these
defines unconditionally, but marked for removal after subsequent
cleanup.

Removal of the now unused libkern routines will follow in the next
commit.

Reviewed by:	dougm, imp (previous version)
Sponsored by:	The FreeBSD Foundation
Differential Revision:	https://reviews.freebsd.org/D40698
2023-07-06 14:46:41 -03:00
Andrew Turner 51fc92e68e Make some arm64 debug monitor functions static
These are only used within debug_monitor.c so can become static.

Sponsored by:	Arm Ltd
2023-07-05 11:05:38 +01:00
Andrew Turner df0d0fc990 Add helpers to allocate an arm64 VFP state struct
This will be used by bhyve and will allow the size to change, e.g. for SVE.

Reviewed by:	markj
Sponsored by:	Arm Ltd
Differential Revision:	https://reviews.freebsd.org/D40131
2023-07-05 10:42:14 +01:00
Alan Cox e59d202312 arm64: make VM_NFREEORDER and the comment describing it match
The setting of VM_NFREEORDER and the comment describing it were copied
from sparc64 where both the page size and the number of page table
entries that fit in a cache line are different from arm64.

Reviewed by:	andrew, kib, markj
MFC after:	2 weeks
Differential Revision:	https://reviews.freebsd.org/D40782
2023-06-29 12:48:48 -05:00
Mark Johnston fbec1f9195 arm64: Add a masked get_kernel_reg()
This lets consumers fetch the value of a system register and apply a
mask over individual fields.  That is, each field in the returned value
will be the "smaller" of the two provided by "mask" and the value saved
in kern_cpu_desc.  This will be used by vmm to sanitize host system
register fields.

Reviewed by:	andrew
MFC after:	2 weeks
Sponsored by:	The FreeBSD Foundation
Sponsored by:	Klara, Inc. (hardware)
Differential Revision:	https://reviews.freebsd.org/D40500
2023-06-28 16:29:49 -04:00
Mark Johnston d325184232 arm64: Remove struct arm64_frame
It was used in one place and was added specifically to support dtrace
stack unwinding code.  Write an equivalent expression using struct
unwind_state instead.  No functional change intended.

Reviewed by:	andrew
MFC after:	1 week
Sponsored by:	Innovate UK
Differential Revision:	https://reviews.freebsd.org/D40538
2023-06-15 12:38:45 -04:00
Andrew Turner 178747a158 Add more arm64 special register values
These will be used to simplify the kernel special register handling.

Sponsored by:	Arm Ltd
2023-06-12 09:31:14 +01:00