in the SYNOPSIS and DESCRIPTION.
Note that -l remains an ugly exception, to which no known rules apply,
since the specification of a single option multiple times isn't normal
standards-compliant CLI behaviour.
While here, mark AF_INET* and LOG_* defined values up with Dv.
# Note: The ToPIC 100 and the ToPIC 97 datasheets are in disagreement
# as to if this bit is supposed to be set or cleared to enable INTA routing
# so I made my best guess.
Also, comments about the various chipsets, including some grumpy ones
about how vague the O2micro datasheets are.
function and csc interrupt routing path (eg, ISA or PCI) so that we
can more easily switch between the two.
When we don't have a card ISR, put the function interrupt into ISA
mode. This effectively masks the interrupt since it happens once, and
not again until we have an ISR. This should help hangs, and might
help people that unwisely update the kernel w/o updating pccardd.
This is done at mapirq time.
Force CL-PD6729/30 to use ISA interrupt routing and maybe even detect
the number of pccard slots properly (this is still WIP). We aren't
going to support PCI interrupts for this release. A future release
should support them, however. Shibata-san's 3.3V fixes are not
included.
Add a hack which should, in i386, rewrite IRQ 0 cardbus bridges to be
IRQ 255, which should cause interrupts to be routed. This is mostly
untested since my one tester disappeared after reporting nothing
changed.
Implement, but do not use, a power method called cardbus. It looked
like a great way to get around the 3.3V problem, but it seems that you
can only use it to power cardbus cards (I get no CIS when I enable it,
so maybe we're programming things bogusly).
GC the intr and argp stuff from the slot database.
Improve the ToPIC support with the power hacks that Nakagawa-san
published in FreeBSD Press and that Hiroyuki Aizu-san ported to
-stable. The ToPIC hacks were for 3.3V support in ToPIC 100, but it
looks like the '97 also has identical registers, so use them too.
Add some #defines for the cardbus power stuff.
Finally implement making CSC on the Ricoh chips ISA or PCI. This will
allow polling mode to work on vaios, I think.
Add some minor debugging. This should likely be cleaned up or put
behing a bootverbose.
Some of this work, and earlier work, was influanced by Chiharu
Shibata-san's power handing patches posted to bsd-nomads:15866.
MFC: Soon, if possible.
16 bits access is required by nsp driver to work in SMIT mode.
Since previously (1.65 and before in current, and 1.46.28 and before
in stable branch) 16 bits access was default, I hope it will break nothing.
Okayed-by: imp
so as to make the "picobsd" script less version-specific.
Improve handling of cross-builds (which requires creation of
includes and libraries for the new source tree).
The "picobsd" script will not probably work on -current because it still
uses 'vn' instead of 'md', but i am commiting it anyways to keep it
in sync with the version in -stable.
with user windows in kernel mode. We split the windows using %otherwin,
but instead of spilling user window directly to the pcb, we attempt to
spill to user space. If this fails because a stack page is not resident
(or the stack is smashed), the fault handler at tl 2 will detect the
situation and resume at tl 1 again where recovery code can spill to the
pcb. Any windows that have been saved to the pcb will be copied out to
the user stack on return from kernel mode.
Add a first stab at 32 bit window handling. This uses much of the same
recovery code as above because the alignment of the stack pointer is used
to detect 32 bit code. Attempting to spill a 32 bit window to a 64 bit
stack, or vice versa, will cause an alignment fault. The recovery code
then changes the window state to vector to a 32 bit spill/fill handler
and retries the faulting instruction.
Add ktr traces in useful places during trap processing.
Adjust comments to reflect new code and add many more.
Remove the modified tte bit and add a softwrite bit. Mappings are only
writeable if they have been written to, thus in general modify just
duplicates the write bit. The softwrite bit makes it easier to distinguish
mappings which should be writeable but are not yet modified.
Move the exec bit down one, it was being sign extended when used as an
immediate operand.
Use the lock bit to mean tsb page and remove the tsb bit. These are the
only form of locked (tsb) entries we support and we need to conserve bits
where possible.
Implement pmap_copy_page and pmap_is_modified and friends.
Detect mappings that are being being upgraded from read-only to read-write
due to copy-on-write and update the write bit appropriately.
Make trap_mmu_fault do the right thing for protection faults, which is
necessary to implement copy on write correctly. Also handle a bunch
more userland trap types and add ktr traces.
