Commit graph

96 commits

Author SHA1 Message Date
Brooks Davis ef9871c620 libthr: move _umtx_op_err() to libsys
Declare in sys/umtx.h and implement in libsys.  Explicitly link libthr
with libsys.

When building libthr static include _umtx_op_err so we don't break static
linkage with -lpthread.

Reviewed by:	kib, emaste, imp
Pull Request:	https://github.com/freebsd/freebsd-src/pull/908
2024-02-05 20:34:56 +00:00
Warner Losh d0b2dbfa0e Remove $FreeBSD$: one-line sh pattern
Remove /^\s*#[#!]?\s*\$FreeBSD\$.*$\n/
2023-08-16 11:55:03 -06:00
Warner Losh b3e7694832 Remove $FreeBSD$: two-line .h pattern
Remove /^\s*\*\n \*\s+\$FreeBSD\$$\n/
2023-08-16 11:54:16 -06:00
Warner Losh 4d846d260e spdx: The BSD-2-Clause-FreeBSD identifier is obsolete, drop -FreeBSD
The SPDX folks have obsoleted the BSD-2-Clause-FreeBSD identifier. Catch
up to that fact and revert to their recommended match of BSD-2-Clause.

Discussed with:		pfg
MFC After:		3 days
Sponsored by:		Netflix
2023-05-12 10:44:03 -06:00
Andrew Turner c7904405a8 Remove PAGE_SIZE from libthr
In libthr we use PAGE_SIZE when allocating memory with mmap and to check
various structs will fit into a single page so we can use this allocator
for them.

Ask the kernel for the page size on init for use by the page allcator
and add a new machine dependent macro to hold the smallest page size
the architecture supports to check the structure is small enough.

This allows us to use the same libthr on arm64 with either 4k or 16k
pages.

Reviewed by:	kib, markj, imp
Sponsored by:	The FreeBSD Foundation
Differential Revision: https://reviews.freebsd.org/D34984
2022-05-03 11:04:41 +01:00
Warner Losh 39034b1254 mips: remove pthread support
Sponsored by:		Netflix
2021-12-31 00:14:53 -07:00
John Baldwin 75395023ff libthr: Use <machine/tls.h> for most MD TLS details.
Note that on amd64 this effectively removes the unused tcb_spare field
from the end of struct tcb since the definition of struct tcb in
<x86/tls.h> does not include that field.

Reviewed by:	kib, jrtc27
Sponsored by:	The University of Cambridge, Google Inc.
Differential Revision:	https://reviews.freebsd.org/D33352
2021-12-09 13:17:41 -08:00
John Baldwin 5d8176337e libthr: Remove the DTV_OFFSET macro.
This macro is confusing as it is not related to the similarly named
TLS_DTV_OFFSET.  Instead, replace its one use with the desired
expression which is the same on all platforms.

Reviewed by:	kib, emaste, jrtc27
Sponsored by:	The University of Cambridge, Google Inc.
Differential Revision:	https://reviews.freebsd.org/D33345
2021-12-09 13:15:38 -08:00
Andrew Turner 4d9488674f Remove the last users of ARM_TP_ADDRESS
This was only needed on 32-bit arm prior to ARMv6. As we only support
ARMv6 or later remove it.

Reviewed by:	mannu
Sponsored by:	Innovate UK
Differential Revision:	https://reviews.freebsd.org/D29624
2021-04-08 07:52:54 +00:00
Conrad Meyer 78599c32ef Add CFI start/end proc directives to arm64, i386, and ppc
Follow-up to r353959 and r368070: do the same for other architectures.

arm32 already seems to use its own .fnstart/.fnend directives, which
appear to be ARM-specific variants of the same thing.  Likewise, MIPS
uses .frame directives.

Reviewed by:	arichardson
Differential Revision:	https://reviews.freebsd.org/D27387
2020-12-05 00:33:28 +00:00
Warner Losh f33b14f02e Remove libthr, csu, libthread_db and testfloat sparc64 specific directories.
Submitted by:	kib@ (libthr)
2020-02-27 04:44:58 +00:00
Conrad Meyer 5ffc069a3a libthr: Add missing END() directive for umtx_op_err (amd64)
Like r353929, related to D22122.  No functional change.

Reviewed by:	emaste, kib (earlier version both)
2019-10-23 18:27:30 +00:00
Mitchell Horne 68b6aaa70d RISC-V: Fix an alignment warning in libthr
Compiling with clang gives a loss-of-alignment error due the cast to
uint8_t *. Since the TLS is always tcb aligned and TP_OFFSET is defined
as sizeof(struct tcb) we can guarantee there is no misalignment. Silence
the error by moving the offset into the inline assembly.

Reviewed by:	br
MFC after:	1 week
Differential Revision:	https://reviews.freebsd.org/D21926
2019-10-09 02:02:22 +00:00
Brandon Bergren bdccf0bbac Implement _umtx_op_err.S on powerpc / powerpc64.
As per r177853, we need to avoid using errno inside user mutex code, since
 signal handlers can interfere with it and mess up libthr internal state.

So, implement _umtx_op_err() instead, which makes a raw syscall and
returns the error value directly instead of using errno.

Approved by: jhibbits (mentor)
Differential Revision: https://reviews.freebsd.org/D20946
2019-08-09 20:16:38 +00:00
Konstantin Belousov 5d00c5a657 Fix initial exec TLS mode for dynamically loaded shared objects.
If dso uses initial exec TLS mode, rtld tries to allocate TLS in
static space. If there is no space left, the dlopen(3) fails. If space
if allocated, initial content from PT_TLS segment is distributed to
all threads' pcbs, which was missed and caused un-initialized TLS
segment for such dso after dlopen(3).

The mode is auto-detected either due to the relocation used, or if the
DF_STATIC_TLS dynamic flag is set.  In the later case, the TLS segment
is tried to allocate earlier, which increases chance of the dlopen(3)
to succeed.  LLD was recently fixed to properly emit the flag, ld.bdf
did it always.

Initial test by:	dumbbell
Tested by:	emaste (amd64), ian (arm)
Tested by:	Gerald Aryeetey <aryeeteygerald_rogers.com> (arm64)
Sponsored by:	The FreeBSD Foundation
MFC after:	2 weeks
Differential revision:	https://reviews.freebsd.org/D19072
2019-03-29 17:52:57 +00:00
Leandro Lupori 9031358d67 silence cast-align warnings from clang on powerpc64
silence the following warning when compiling libthr with clang 8
for powerpc64 architecture:

usr/src/lib/libthr/arch/powerpc/include/pthread_md.h:82:10: error:
cast from 'uint8_t *' (aka 'unsigned char *') to 'struct tcb *'
increases required alignment from 1 to 8 [-Werror,-Wcast-align]
82:  return ((struct tcb *)(_tp - TP_OFFSET));

Submitted by:	alfredo.junior_eldorado.org.br
Reviewed by:	git_bdragon.rtk0.net, emaste, kib, jhibbits, luporl
Differential Revision:	https://reviews.freebsd.org/D18807
2019-02-13 18:28:53 +00:00
Pedro F. Giffuni 5e53a4f90f lib: further adoption of SPDX licensing ID tags.
Mainly focus on files that use BSD 2-Clause license, however the tool I
was using mis-identified many licenses so this was mostly a manual - error
prone - task.

The Software Package Data Exchange (SPDX) group provides a specification
to make it easier for automated tools to detect and summarize well known
opensource licenses. We are gradually adopting the specification, noting
that the tags are considered only advisory and do not, in any way,
superceed or replace the license texts.
2017-11-26 02:00:33 +00:00
Michal Meloun f879eb0488 Fix misleading comment.
Not a functional change.

MFC after:	3 days
2017-10-29 14:26:37 +00:00
Eric van Gyzen 718fb5ba5b libthr: fix warnings at WARNS=6
Fix more warnings about redundant declarations.

Reviewed by:	kib emaste
MFC after:	3 days
Sponsored by:	Dell EMC
Differential Revision:	https://reviews.freebsd.org/D10932
2017-05-26 15:56:28 +00:00
Adrian Chadd cb916ce754 [mips] convert over =v to =r for the inline assembly.
Later gcc and clang have deprecated =v (which maps to a specific temp
register) and instead we should just use =r to have the assembler
(hopefully!) save/restore things appropriately after choosing
a register.

Tested:

* AR9344 SoC, with userreg support
* AR9331 SoC, with no userreg support

Sponsored by:	Sponsored by: DARPA, AFRL (MIPS TLS user register work)
2016-08-14 19:04:37 +00:00
Adrian Chadd b812fe4d6b [mips] add support for using the MIPS user register for TLS data.
This work, originally from Stacey Son, uses the MIPS UserReg for
reading the TLS data, and will fall back to the normal syscall path
when it isn't supported.

This code dynamically patches cpu_switch() to bypass the UserReg
instruction so to avoid generating a machine exception.

Thanks to sson for the original work, and to Dan Nelson for
bringing it to date and testing it on MIPS32 with me.

Tested:

* mips64 (sson)
* mips74k (dnelson_1901@yahoo.com) - AR9344 SoC, UserReg support
* mips24k (adrian) - AR9331 SoC, no UserReg support

Obtained from:	sson, dnelson_1901@yahoo.com
2016-08-07 01:29:55 +00:00
Ruslan Bukin 5be589603e Unmagic the thread pointer offset. 2016-04-14 15:31:05 +00:00
Ruslan Bukin 3d32f0f6e5 Add pthread MD part for RISC-V.
Reviewed by:	andrew
Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
Differential Revision:	https://reviews.freebsd.org/D5063
2016-01-27 14:10:50 +00:00
Ruslan Bukin 1fdcc5e5c0 Start support for the RISC-V 64-bit architecture developed by UC Berkeley.
RISC-V is a new ISA designed to support computer research and education, and
is now become a standard open architecture for industry implementations.

This is a minimal set of changes required to run 'make kernel-toolchain'
using external (GNU) toolchain.

The FreeBSD/RISC-V project home: https://wiki.freebsd.org/riscv.

Reviewed by:	andrew, bdrewery, emaste, imp
Sponsored by:	DARPA, AFRL
Sponsored by:	HEIF5
Differential Revision:	https://reviews.freebsd.org/D4445
2015-12-11 22:55:23 +00:00
Eric van Gyzen ddab052725 Disable SSE in libthr
Clang emits SSE instructions on amd64 in the common path of
pthread_mutex_unlock.  If the thread does not otherwise use SSE,
this usage incurs a context-switch of the FPU/SSE state, which
reduces the performance of multiple real-world applications by a
non-trivial amount (3-5% in one application).

Instead of this change, I experimented with eagerly switching the
FPU state at context-switch time.  This did not help.  Most of the
cost seems to be in the read/write of memory--as kib@ stated--and
not in the #NM handling.  I tested on machines with and without
XSAVEOPT.

One counter-argument to this change is that most applications already
use SIMD, and the number of applications and amount of SIMD usage
are only increasing.  This is absolutely true.  I agree that--in
general and in principle--this change is in the wrong direction.
However, there are applications that do not use enough SSE to offset
the extra context-switch cost.  SSE does not provide a clear benefit
in the current libthr code with the current compiler, but it does
provide a clear loss in some cases.  Therefore, disabling SSE in
libthr is a non-loss for most, and a gain for some.

I refrained from disabling SSE in libc--as was suggested--because
I can't make the above argument for libc.  It provides a wide variety
of code; each case should be analyzed separately.

https://lists.freebsd.org/pipermail/freebsd-current/2015-March/055193.html

Suggestions from:	dim, jmg, rpaulo
Approved by:	kib (mentor)
MFC after:	2 weeks
Sponsored by:	Dell Inc.
2015-08-05 12:53:55 +00:00
Andrew Turner a7dfee7ab1 Add pthread_md.h for arm64.
Differential Revision:	https://reviews.freebsd.org/D2137
Reviewed by:	kib
Sponsored by:	The FreeBSD Foundation
2015-03-30 19:10:09 +00:00
Andrew Turner 8daa81674e Start to import support for the AArch64 architecture from ARM. This change
only adds support for kernel-toolchain, however it is expected further
changes to add kernel and userland support will be committed as they are
reviewed.

As our copy of binutils is too old the devel/aarch64-binutils port needs
to be installed to pull in a linker.

To build either TARGET needs to be set to arm64, or TARGET_ARCH set to
aarch64. The latter is set so uname -p will return aarch64 as existing
third party software expects this.

Differential Revision:	https://reviews.freebsd.org/D2005
Relnotes:	Yes
Sponsored by:	The FreeBSD Foundation
2015-03-19 13:53:47 +00:00
Andrew Turner 20fe2c9465 Merge all the copies of _tcb_ctor and _tcb_dtor.
The amd64, i386, and sparc64 versions were identical, with the one
difference where the former two used inline asm instead of _tcb_get. I
have compared the function before and after replacing the asm with _tcb_get
and found the object files to be identical.

The arm, mips, and powerpc versions were almost identical. The only
difference was the powerpc version used an alignment of 1 where arm and
mips used 16. As this is an increase in alignment is will be safe.

Along with this arm, mips, and powerpc all passed, when initial was true,
the value returned from _tcb_get as the first argument to
_rtld_allocate_tls. This would then return this pointer back to the caller.
We can remove these extra calls by checking if initial is set and setting
the thread control block directly. As this is what the sparc64 code does
we can use it directly.

As after these observations all the architectures can now have identical
code we can merge them into a common file.

Differential Revision:	https://reviews.freebsd.org/D1556
Reviewed by:	kib
Sponsored by:	The FreeBSD Foundation
2015-01-21 16:41:05 +00:00
Justin Hibbits 85eda151ff Avoid use of register variables. Clang 3.5 treats this as undefined behavior,
and bad things happen.

MFC after:	1 week
2015-01-06 03:50:43 +00:00
Marcel Moolenaar e7d939bda2 Remove ia64.
This includes:
o   All directories named *ia64*
o   All files named *ia64*
o   All ia64-specific code guarded by __ia64__
o   All ia64-specific makefile logic
o   Mention of ia64 in comments and documentation

This excludes:
o   Everything under contrib/
o   Everything under crypto/
o   sys/xen/interface
o   sys/sys/elf_common.h

Discussed at: BSDcan
2014-07-07 00:27:09 +00:00
Oleksandr Tymoshenko 89e757fe6f Merging of projects/armv6, part 2
Handle TLS for ARMv6 and ARMv7
2012-08-15 03:08:29 +00:00
Oleksandr Tymoshenko 34e3f7e717 - Switch to saving non-offseted pointer to TLS block in order too keep things simple 2012-03-06 03:27:58 +00:00
Oleksandr Tymoshenko 8ecdc98b5b Add thread-local storage support for arm:
- Switch to Variant I TCB layout
- Use function from rtld for TCB allocation/deallocation
2012-02-14 00:17:43 +00:00
Oleksandr Tymoshenko dda3ee8770 Switch MIPS TLS implementation to Variant I:
Save pointer to the TLS structure taking into account TP_OFFSET
and TCB structure size.
2012-02-10 06:53:25 +00:00
Dimitry Andric b34d83a709 The TCB_GET32() and TCB_GET64() macros in the i386 and amd64-specific
versions of pthread_md.h have a special case of dereferencing a null
pointer.  Clang warns about this with:

In file included from lib/libthr/arch/i386/i386/pthread_md.c:36:
lib/libthr/arch/i386/include/pthread_md.h:96:10: error: indirection of non-volatile null pointer will be deleted, not trap [-Werror,-Wnull-dereference]
        return (TCB_GET32(tcb_self));
                ^~~~~~~~~~~~~~~~~~~
lib/libthr/arch/i386/include/pthread_md.h:73:13: note: expanded from:
            : "m" (*(u_int *)(__tcb_offset(name))));            \
                   ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
lib/libthr/arch/i386/include/pthread_md.h:96:10: note: consider using __builtin_trap() or qualifying pointer with 'volatile'

Since this indirection is done relative to the fs or gs segment, to
retrieve thread-specific data, it is an exception to the rule.

Therefore, add a volatile qualifier to tell the compiler we really want
to dereference a zero address.

MFC after:	1 week
2011-12-15 19:42:25 +00:00
Marius Strobl 6ce2f878d3 Merge from r161730:
o  Set TP using inline assembly to avoid dead code elimination.
o  Eliminate _tcb.

Merge from r161840:
Stylize: avoid using a global register variable.

Merge from r157461:
Simplify _get_curthread() and _tcb_ctor because libc and rtld now
already allocate thread pointer space in tls block for initial thread.

Merge from r177853:
Replace function _umtx_op with _umtx_op_err, the later function directly
returns errno, because errno can be mucked by user's signal handler and
most of pthread api heavily depends on errno to be correct, this change
should improve stability of the thread library.

MFC after:	1 week
2011-06-18 11:07:09 +00:00
Konstantin Belousov 6c69d05232 Add section .note.GNU-stack for assembly files used by 386 and amd64. 2011-01-07 16:09:33 +00:00
Warner Losh 10f3ae5899 Merge from tbemd, with a small amount of rework:
For all libthr contexts, use ${MACHINE_CPUARCH}
for all libc contexts, use ${MACHINE_ARCH} if it exists, otherwise use
${MACHINE_CPUARCH}
Move some common code up a layer (the .PATH statement was the same in
all the arch submakefiles).

# Hope she hasn't busted powerpc64 with this...
2010-09-13 01:43:10 +00:00
Nathan Whitehorn f4fbf9c859 Unify 32-bit and 64-bit PowerPC libthr support. This reduces code
duplication, and simplifies the TBEMD import.

Requested by:	imp
2010-08-24 20:50:08 +00:00
Nathan Whitehorn 944792aa12 Fix SVN mismerge. We somehow ended up with the 32-bit powerpc version
in arch/powerpc64 instead of the 64-bit one.
2010-07-11 05:13:38 +00:00
Nathan Whitehorn 65801ce52d Powerpc64 thread libraries support. 2010-07-10 15:13:49 +00:00
Warner Losh b543d9ad75 Merge r195129 from project/mips to head by hand:
r195129 | gonzo | 2009-06-27 17:28:56 -0600 (Sat, 27 Jun 2009) | 2 lines
- Use sysarch(2) in MIPS version of _tcb_set/_tcb_get
2010-01-09 00:07:47 +00:00
Marcel Moolenaar 3b43a26b50 Implement _umtx_op_err() for ia64. 2009-10-24 20:07:17 +00:00
Warner Losh 13d2e92b70 Commit missing mips libthr support that I thought I'd committed earlier 2008-05-11 05:54:52 +00:00
Warner Losh 416e6cfbf0 Bring in mips threads support from perforce mips2-jnpr branch. 2008-04-26 12:17:57 +00:00
David Xu d6e0eb0a48 Replace function _umtx_op with _umtx_op_err, the later function directly
returns errno, because errno can be mucked by user's signal handler and
most of pthread api heavily depends on errno to be correct, this change
should improve stability of the thread library.
2008-04-02 07:41:25 +00:00
David E. O'Brien a2c4cd4549 style.Makefile(5) 2008-02-13 05:25:43 +00:00
David E. O'Brien 6cc9986927 style(9) 2008-02-13 05:12:05 +00:00
David Xu d99f6dac14 - Remove variable _thr_scope_system, all threads are system scope.
- Rename _thr_smp_cpus to boolean variable _thr_is_smp.
- Define CPU_SPINWAIT macro for each arch, only X86 supports it.
2006-12-15 11:52:01 +00:00
Marcel Moolenaar be2f4bda88 Stylize: avoid using a global register variable. 2006-09-01 21:01:11 +00:00