![]() The existing value for M1 is 64, which is the same as other arm64 cpus.
But the correct cacheLineSize for M1 should be 128, which can be
verified using the following command:
$ sysctl -a hw | grep cachelinesize
hw.cachelinesize: 128
Fixes #53075
Change-Id: Iaa8330010a4499b9b357c70743d55aed6ddb8588
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