d3dx9: Add source register modifiers (sm 2+) support to the shader assembler.

This commit is contained in:
Matteo Bruni 2010-04-21 16:15:46 +02:00 committed by Alexandre Julliard
parent 004a30a5c3
commit ce3c1dfcb6
6 changed files with 79 additions and 3 deletions

View file

@ -129,6 +129,8 @@ ps_3_0 {return VER_PS30; }
\( {return yytext[0]; }
\) {return yytext[0]; }
\_abs {return SMOD_ABS; }
{PREPROCESSORDIRECTIVE} {
/* TODO: update current line information */
TRACE("line info update: %s", yytext);

View file

@ -45,6 +45,7 @@ void set_rel_reg(struct shader_reg *reg, struct rel_reg *rel) {
%union {
unsigned int regnum;
struct shader_reg reg;
DWORD srcmod;
DWORD writemask;
struct {
DWORD writemask;
@ -93,6 +94,9 @@ void set_rel_reg(struct shader_reg *reg, struct rel_reg *rel) {
%token MOD_PP
%token MOD_CENTROID
/* Source register modifiers */
%token SMOD_ABS
/* Misc stuff */
%token <component> COMPONENT
@ -100,6 +104,7 @@ void set_rel_reg(struct shader_reg *reg, struct rel_reg *rel) {
%type <reg> dreg
%type <reg> sreg_name
%type <reg> sreg
%type <srcmod> smod
%type <writemask> writemask
%type <wm_components> wm_components
%type <swizzle> swizzle
@ -372,6 +377,34 @@ sreg: sreg_name rel_reg swizzle
$$.srcmod = BWRITERSPSM_NONE;
set_rel_reg(&$$, &$2);
}
| sreg_name rel_reg smod swizzle
{
$$.type = $1.type;
$$.regnum = $1.regnum;
set_rel_reg(&$$, &$2);
$$.srcmod = $3;
$$.swizzle = $4;
}
| '-' sreg_name rel_reg swizzle
{
$$.type = $2.type;
$$.regnum = $2.regnum;
$$.srcmod = BWRITERSPSM_NEG;
set_rel_reg(&$$, &$3);
$$.swizzle = $4;
}
| '-' sreg_name rel_reg smod swizzle
{
$$.type = $2.type;
$$.regnum = $2.regnum;
set_rel_reg(&$$, &$3);
switch($4) {
case BWRITERSPSM_ABS: $$.srcmod = BWRITERSPSM_ABSNEG; break;
default:
FIXME("Unhandled combination of NEGATE and %u\n", $4);
}
$$.swizzle = $5;
}
rel_reg: /* empty */
{
@ -379,6 +412,11 @@ rel_reg: /* empty */
$$.additional_offset = 0;
}
smod: SMOD_ABS
{
$$ = BWRITERSPSM_ABS;
}
sreg_name: REG_TEMP
{
$$.regnum = $1; $$.type = BWRITERSPR_TEMP;

View file

@ -68,6 +68,18 @@ DWORD d3d9_writemask(DWORD bwriter_writemask) {
return ret;
}
DWORD d3d9_srcmod(DWORD bwriter_srcmod) {
switch(bwriter_srcmod) {
case BWRITERSPSM_NONE: return D3DSPSM_NONE;
case BWRITERSPSM_NEG: return D3DSPSM_NEG;
case BWRITERSPSM_ABS: return D3DSPSM_ABS;
case BWRITERSPSM_ABSNEG: return D3DSPSM_ABSNEG;
default:
FIXME("Unhandled BWRITERSPSM token %u\n", bwriter_srcmod);
return 0;
}
}
DWORD d3d9_dstmod(DWORD bwriter_mod) {
DWORD ret = 0;
@ -99,6 +111,16 @@ DWORD d3d9_opcode(DWORD bwriter_opcode) {
}
}
/* Debug print functions */
const char *debug_print_srcmod(DWORD mod) {
switch(mod) {
case BWRITERSPSM_NEG: return "D3DSPSM_NEG";
case BWRITERSPSM_ABS: return "D3DSPSM_ABS";
case BWRITERSPSM_ABSNEG: return "D3DSPSM_ABSNEG";
default: return "Unknown source modifier\n";
}
}
const char *debug_print_dstmod(DWORD mod) {
switch(mod) {
case 0:
@ -196,6 +218,15 @@ const char *debug_print_srcreg(const struct shader_reg *reg, shader_type st) {
case BWRITERSPSM_NONE:
return wine_dbg_sprintf("%s%s", get_regname(reg, st),
debug_print_swizzle(reg->swizzle));
case BWRITERSPSM_NEG:
return wine_dbg_sprintf("-%s%s", get_regname(reg, st),
debug_print_swizzle(reg->swizzle));
case BWRITERSPSM_ABS:
return wine_dbg_sprintf("%s_abs%s", get_regname(reg, st),
debug_print_swizzle(reg->swizzle));
case BWRITERSPSM_ABSNEG:
return wine_dbg_sprintf("-%s_abs%s", get_regname(reg, st),
debug_print_swizzle(reg->swizzle));
}
return "Unknown modifier";
}

View file

@ -217,6 +217,7 @@ static void sm_3_srcreg(struct bc_writer *This,
token |= reg->regnum & D3DSP_REGNUM_MASK;
token |= d3d9_swizzle(reg->swizzle) & D3DVS_SWIZZLE_MASK;
token |= d3d9_srcmod(reg->srcmod);
put_dword(buffer, token);
}

View file

@ -350,6 +350,7 @@ const char *debug_print_opcode(DWORD opcode);
/* Utilities for internal->d3d constant mapping */
DWORD d3d9_swizzle(DWORD bwriter_swizzle);
DWORD d3d9_writemask(DWORD bwriter_writemask);
DWORD d3d9_srcmod(DWORD bwriter_srcmod);
DWORD d3d9_dstmod(DWORD bwriter_mod);
DWORD d3d9_register(DWORD bwriter_register);
DWORD d3d9_opcode(DWORD bwriter_opcode);
@ -388,6 +389,9 @@ typedef enum _BWRITERSHADER_PARAM_DSTMOD_TYPE {
typedef enum _BWRITERSHADER_PARAM_SRCMOD_TYPE {
BWRITERSPSM_NONE = 0,
BWRITERSPSM_NEG,
BWRITERSPSM_ABS,
BWRITERSPSM_ABSNEG,
} BWRITERSHADER_PARAM_SRCMOD_TYPE;
#define BWRITER_SM1_VS 0xfffe

View file

@ -1053,11 +1053,11 @@ static void vs_3_0_test(void) {
"add_sat r0, r0, r1\n",
{0xfffe0300, 0x03000002, 0x801f0000, 0x80e40000, 0x80e40001, 0x0000ffff}
},*/
/* {*/ /* shader 8 */
/* "vs_3_0\n"
{ /* shader 8 */
"vs_3_0\n"
"mov r2, r1_abs\n",
{0xfffe0300, 0x02000001, 0x800f0002, 0x8be40001, 0x0000ffff}
},*/
},
{ /* shader 9 */
"vs_3_0\n"
"mov r2, r1.xygb\n",