From c5bb73038b01503edd8748f1b006cbf9482f1b5b Mon Sep 17 00:00:00 2001
From: Pierre d'Herbemont <stegefin@free.fr>
Date: Sun, 4 May 2003 02:26:53 +0000
Subject: [PATCH] Add register preservation when using lawrx instruction. Fix
 ';' ending to '\n' ending for a better compatibility with darwin.

---
 libs/port/interlocked.c | 48 ++++++++++++++++++++---------------------
 1 file changed, 24 insertions(+), 24 deletions(-)

diff --git a/libs/port/interlocked.c b/libs/port/interlocked.c
index 3ebe288f292..bd0364d1b62 100644
--- a/libs/port/interlocked.c
+++ b/libs/port/interlocked.c
@@ -107,11 +107,11 @@ void* interlocked_cmpxchg_ptr( void **dest, void* xchg, void* compare)
     long ret = 0;
     long scratch;
     __asm__ __volatile__(
-        "0:    lwarx %0,0,%2 ;"
-        "      xor. %1,%4,%0;"
-        "      bne 1f;"
-        "      stwcx. %3,0,%2;"
-        "      bne- 0b;"
+        "0:    lwarx %0,0,%2\n"
+        "      xor. %1,%4,%0\n"
+        "      bne 1f\n"
+        "      stwcx. %3,0,%2\n"
+        "      bne- 0b\n"
         "1:    "
         : "=&r"(ret), "=&r"(scratch)
         : "r"(dest), "r"(xchg), "r"(compare)
@@ -124,15 +124,15 @@ long interlocked_cmpxchg( long *dest, long xchg, long compare)
     long ret = 0;
     long scratch;
     __asm__ __volatile__(
-        "0:    lwarx %0,0,%2 ;"
-        "      xor. %1,%4,%0;"
-        "      bne 1f;"
-        "      stwcx. %3,0,%2;"
-        "      bne- 0b;"
+        "0:    lwarx %0,0,%2\n"
+        "      xor. %1,%4,%0\n"
+        "      bne 1f\n"
+        "      stwcx. %3,0,%2\n"
+        "      bne- 0b\n"
         "1:    "
         : "=&r"(ret), "=&r"(scratch)
         : "r"(dest), "r"(xchg), "r"(compare)
-        : "cr0","memory");
+        : "cr0","memory","r0");
     return ret;
 }
 
@@ -141,13 +141,13 @@ long interlocked_xchg_add( long *dest, long incr )
     long ret = 0;
     long zero = 0;
     __asm__ __volatile__(
-        "0:    lwarx %0, %3, %1;"
-        "      add %0, %2, %0;"
-        "      stwcx. %0, %3, %1;"
-        "      bne- 0b;"
+        "0:    lwarx %0, %3, %1\n"
+        "      add %0, %2, %0\n"
+        "      stwcx. %0, %3, %1\n"
+        "      bne- 0b\n"
         : "=&r" (ret)
         : "r"(dest), "r"(incr), "r"(zero)
-        : "cr0", "memory"
+        : "cr0", "memory", "r0"
     );
     return ret-incr;
 }
@@ -156,12 +156,12 @@ long interlocked_xchg( long* dest, long val )
 {
     long ret = 0;
     __asm__ __volatile__(
-        "0:    lwarx %0,0,%1 ;"
-        "      stwcx. %2,0,%1;"
-        "      bne- 0b;"
+        "0:    lwarx %0,0,%1\n"
+        "      stwcx. %2,0,%1\n"
+        "      bne- 0b\n"
         : "=&r"(ret)
         : "r"(dest), "r"(val)
-        : "cr0","memory");
+        : "cr0","memory","r0");
     return ret;
 }
 
@@ -169,12 +169,12 @@ void* interlocked_xchg_ptr( void** dest, void* val )
 {
     void *ret = NULL;
     __asm__ __volatile__(
-        "0:    lwarx %0,0,%1 ;"
-        "      stwcx. %2,0,%1;"
-        "      bne- 0b;"
+        "0:    lwarx %0,0,%1\n"
+        "      stwcx. %2,0,%1\n"
+        "      bne- 0b \n"
         : "=&r"(ret)
         : "r"(dest), "r"(val)
-        : "cr0","memory");
+        : "cr0","memory","r0");
     return ret;
 }