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include: Rename 64-bit PState to 32-bit Cpsr on ARM64.
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@ -166,7 +166,7 @@ static void* arm64_fetch_context_reg(CONTEXT* ctx, unsigned regno, unsigned* siz
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#ifdef __aarch64__
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switch (regno)
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{
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case CV_ARM64_PSTATE: *size = sizeof(ctx->Cpsr); return &ctx->Cpsr;
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case CV_ARM64_X0 + 0: *size = sizeof(ctx->X0); return &ctx->X0;
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case CV_ARM64_X0 + 1: *size = sizeof(ctx->X1); return &ctx->X1;
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case CV_ARM64_X0 + 2: *size = sizeof(ctx->X2); return &ctx->X2;
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@ -201,7 +201,6 @@ static void* arm64_fetch_context_reg(CONTEXT* ctx, unsigned regno, unsigned* siz
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case CV_ARM64_LR: *size = sizeof(ctx->Lr); return &ctx->Lr;
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case CV_ARM64_SP: *size = sizeof(ctx->Sp); return &ctx->Sp;
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case CV_ARM64_PC: *size = sizeof(ctx->Pc); return &ctx->Pc;
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case CV_ARM64_PSTATE: *size = sizeof(ctx->PState); return &ctx->PState;
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}
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#endif
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FIXME("Unknown register %x\n", regno);
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@ -212,6 +211,7 @@ static const char* arm64_fetch_regname(unsigned regno)
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{
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switch (regno)
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{
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case CV_ARM64_PSTATE: return "cpsr";
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case CV_ARM64_X0 + 0: return "x0";
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case CV_ARM64_X0 + 1: return "x1";
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case CV_ARM64_X0 + 2: return "x2";
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@ -246,7 +246,6 @@ static const char* arm64_fetch_regname(unsigned regno)
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case CV_ARM64_LR: return "lr";
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case CV_ARM64_SP: return "sp";
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case CV_ARM64_PC: return "pc";
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case CV_ARM64_PSTATE: return "cpsr";
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}
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FIXME("Unknown register %x\n", regno);
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return NULL;
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@ -129,7 +129,7 @@ static void save_context( CONTEXT *context, const ucontext_t *sigcontext )
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context->Lr = LR_sig(sigcontext); /* Link register */
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context->Sp = SP_sig(sigcontext); /* Stack pointer */
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context->Pc = PC_sig(sigcontext); /* Program Counter */
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context->PState = PSTATE_sig(sigcontext); /* Current State Register */
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context->Cpsr = PSTATE_sig(sigcontext); /* Current State Register */
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}
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@ -151,7 +151,7 @@ static void restore_context( const CONTEXT *context, ucontext_t *sigcontext )
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LR_sig(sigcontext) = context->Lr; /* Link register */
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SP_sig(sigcontext) = context->Sp; /* Stack pointer */
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PC_sig(sigcontext) = context->Pc; /* Program Counter */
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PSTATE_sig(sigcontext) = context->PState; /* Current State Register */
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PSTATE_sig(sigcontext) = context->Cpsr; /* Current State Register */
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}
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@ -209,7 +209,7 @@ void copy_context( CONTEXT *to, const CONTEXT *from, DWORD flags )
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to->Lr = from->Lr;
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to->Sp = from->Sp;
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to->Pc = from->Pc;
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to->PState = from->PState;
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to->Cpsr = from->Cpsr;
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}
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if (flags & CONTEXT_INTEGER)
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{
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@ -241,7 +241,7 @@ NTSTATUS context_to_server( context_t *to, const CONTEXT *from )
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to->integer.arm64_regs.x[30] = from->Lr;
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to->ctl.arm64_regs.sp = from->Sp;
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to->ctl.arm64_regs.pc = from->Pc;
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to->ctl.arm64_regs.pstate = from->PState;
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to->ctl.arm64_regs.pstate = from->Cpsr;
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}
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if (flags & CONTEXT_INTEGER)
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{
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@ -274,7 +274,7 @@ NTSTATUS context_from_server( CONTEXT *to, const context_t *from )
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to->Lr = from->integer.arm64_regs.x[30];
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to->Sp = from->ctl.arm64_regs.sp;
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to->Pc = from->ctl.arm64_regs.pc;
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to->PState = from->ctl.arm64_regs.pstate;
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to->Cpsr = from->ctl.arm64_regs.pstate;
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}
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if (from->flags & SERVER_CTX_INTEGER)
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{
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@ -1755,6 +1755,7 @@ PRUNTIME_FUNCTION WINAPI RtlLookupFunctionEntry(ULONG_PTR,DWORD*,UNWIND_HISTORY_
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typedef struct _CONTEXT {
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ULONG ContextFlags;
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ULONG Cpsr;
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/* This section is specified/returned if the ContextFlags word contains
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the flag CONTEXT_INTEGER. */
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@ -1793,7 +1794,6 @@ typedef struct _CONTEXT {
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ULONGLONG Lr;
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ULONGLONG Sp;
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ULONGLONG Pc;
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ULONGLONG PState;
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/* These are selected by CONTEXT_FLOATING_POINT */
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/* FIXME */
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@ -60,7 +60,7 @@ static void be_arm64_print_context(HANDLE hThread, const CONTEXT* ctx, int all_r
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int i;
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char buf[8];
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switch (ctx->PState & 0x0f)
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switch (ctx->Cpsr & 0x0f)
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{
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case 0: strcpy(buf, "EL0t"); break;
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case 4: strcpy(buf, "EL1t"); break;
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@ -73,15 +73,15 @@ static void be_arm64_print_context(HANDLE hThread, const CONTEXT* ctx, int all_r
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}
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dbg_printf("Register dump:\n");
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dbg_printf("%s %s Mode\n", (ctx->PState & 0x10) ? "ARM" : "ARM64", buf);
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dbg_printf("%s %s Mode\n", (ctx->Cpsr & 0x10) ? "ARM" : "ARM64", buf);
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strcpy(buf, condflags);
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for (i = 0; buf[i]; i++)
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if (!((ctx->PState >> 26) & (1 << (sizeof(condflags) - i))))
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if (!((ctx->Cpsr >> 26) & (1 << (sizeof(condflags) - i))))
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buf[i] = '-';
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dbg_printf(" Pc:%016lx Sp:%016lx Lr:%016lx Pstate:%016lx(%s)\n",
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ctx->Pc, ctx->Sp, ctx->Lr, ctx->PState, buf);
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dbg_printf(" Pc:%016lx Sp:%016lx Lr:%016lx Cpsr:%08x(%s)\n",
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ctx->Pc, ctx->Sp, ctx->Lr, ctx->Cpsr, buf);
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dbg_printf(" x0: %016lx x1: %016lx x2: %016lx x3: %016lx x4: %016lx\n",
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ctx->X0, ctx->X1, ctx->X2, ctx->X3, ctx->X4);
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dbg_printf(" x5: %016lx x6: %016lx x7: %016lx x8: %016lx x9: %016lx\n",
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@ -104,6 +104,7 @@ static void be_arm64_print_segment_info(HANDLE hThread, const CONTEXT* ctx)
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static struct dbg_internal_var be_arm64_ctx[] =
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{
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{CV_ARM64_PSTATE, "cpsr", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Cpsr), dbg_itype_unsigned_int},
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{CV_ARM64_X0 + 0, "x0", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, X0), dbg_itype_unsigned_long_int},
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{CV_ARM64_X0 + 1, "x1", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, X1), dbg_itype_unsigned_long_int},
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{CV_ARM64_X0 + 2, "x2", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, X2), dbg_itype_unsigned_long_int},
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@ -137,7 +138,6 @@ static struct dbg_internal_var be_arm64_ctx[] =
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{CV_ARM64_LR, "lr", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Lr), dbg_itype_unsigned_long_int},
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{CV_ARM64_SP, "sp", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Sp), dbg_itype_unsigned_long_int},
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{CV_ARM64_PC, "pc", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, Pc), dbg_itype_unsigned_long_int},
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{CV_ARM64_PSTATE, "pstate", (DWORD_PTR*)FIELD_OFFSET(CONTEXT, PState), dbg_itype_unsigned_long_int},
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{0, NULL, 0, dbg_itype_none}
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};
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@ -399,6 +399,7 @@ static struct cpu_register cpu_register_map[] = {
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#elif defined(__aarch64__)
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static const char target_xml[] = "";
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static struct cpu_register cpu_register_map[] = {
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REG(Cpsr, 4, CONTEXT_CONTROL),
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REG(X0, 8, CONTEXT_INTEGER),
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REG(X1, 8, CONTEXT_INTEGER),
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REG(X2, 8, CONTEXT_INTEGER),
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@ -432,7 +433,6 @@ static struct cpu_register cpu_register_map[] = {
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REG(Lr, 8, CONTEXT_INTEGER),
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REG(Sp, 8, CONTEXT_CONTROL),
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REG(Pc, 8, CONTEXT_CONTROL),
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REG(PState, 8, CONTEXT_CONTROL),
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};
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#else
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# error Define the registers map for your CPU
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