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winedbg: Add multiplication operators to ARM disassembler.
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@ -127,6 +127,35 @@ static UINT arm_disasm_branch(UINT inst, ADDRESS64 *addr)
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return 0;
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}
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static UINT arm_disasm_mul(UINT inst, ADDRESS64 *addr)
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{
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short accu = (inst >> 21) & 0x01;
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short condcodes = (inst >> 20) & 0x01;
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if (accu)
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dbg_printf("\n\tmla%s%s\t%s, %s, %s, %s", get_cond(inst), condcodes ? "s" : "",
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tbl_regs[get_nibble(inst, 4)], tbl_regs[get_nibble(inst, 0)],
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tbl_regs[get_nibble(inst, 2)], tbl_regs[get_nibble(inst, 3)]);
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else
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dbg_printf("\n\tmul%s%s\t%s, %s, %s", get_cond(inst), condcodes ? "s" : "",
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tbl_regs[get_nibble(inst, 4)], tbl_regs[get_nibble(inst, 0)],
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tbl_regs[get_nibble(inst, 2)]);
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return 0;
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}
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static UINT arm_disasm_longmul(UINT inst, ADDRESS64 *addr)
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{
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short sign = (inst >> 22) & 0x01;
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short accu = (inst >> 21) & 0x01;
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short condcodes = (inst >> 20) & 0x01;
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dbg_printf("\n\t%s%s%s%s\t%s, %s, %s, %s", sign ? "s" : "u", accu ? "mlal" : "mull",
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get_cond(inst), condcodes ? "s" : "",
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tbl_regs[get_nibble(inst, 3)], tbl_regs[get_nibble(inst, 4)],
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tbl_regs[get_nibble(inst, 0)], tbl_regs[get_nibble(inst, 2)]);
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return 0;
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}
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static UINT arm_disasm_branchreg(UINT inst, ADDRESS64 *addr)
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{
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dbg_printf("\n\tb%s\t%s", get_cond(inst), tbl_regs[get_nibble(inst, 0)]);
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@ -696,6 +725,8 @@ struct inst_arm
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static const struct inst_arm tbl_arm[] = {
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{ 0x0e000000, 0x0a000000, arm_disasm_branch },
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{ 0x0fc000f0, 0x00000090, arm_disasm_mul },
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{ 0x0f8000f0, 0x00800090, arm_disasm_longmul },
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{ 0x0e000090, 0x00000090, arm_disasm_halfwordtrans },
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{ 0x0ffffff0, 0x012fff00, arm_disasm_branchreg },
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{ 0x0ffffff0, 0x012fff10, arm_disasm_branchxchg },
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