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398d271a46
About half of the Processor code is common across architectures, so let's share it with a templated base class. Also, other code that can be shared in some ways, like FPUState and TrapFrame functions, is adjusted here. Functions which cannot be shared trivially (without internal refactoring) are left alone for now.
28 lines
701 B
C++
28 lines
701 B
C++
/*
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* Copyright (c) 2023, kleines Filmröllchen <filmroellchen@serenityos.org>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#pragma once
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#include <AK/Platform.h>
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#include <AK/Types.h>
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#include <Kernel/Arch/x86_64/SIMDState.h>
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VALIDATE_IS_X86()
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namespace Kernel {
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struct [[gnu::aligned(64), gnu::packed]] FPUState {
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SIMD::LegacyRegion legacy_region;
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SIMD::Header xsave_header;
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// FIXME: This should be dynamically allocated! For now, we only save the `YMM` registers here,
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// so this will do for now. The size of the area is queried via CPUID(EAX=0dh, ECX=2):EAX.
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// https://www.intel.com/content/dam/develop/external/us/en/documents/36945
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u8 ext_save_area[256];
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};
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}
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