diff --git a/Kernel/Storage/NVMe/NVMeQueue.cpp b/Kernel/Storage/NVMe/NVMeQueue.cpp index 26a2ab8f90..8871fce23e 100644 --- a/Kernel/Storage/NVMe/NVMeQueue.cpp +++ b/Kernel/Storage/NVMe/NVMeQueue.cpp @@ -15,12 +15,14 @@ namespace Kernel { ErrorOr> NVMeQueue::try_create(u16 qid, u8 irq, u32 q_depth, OwnPtr cq_dma_region, NonnullRefPtrVector cq_dma_page, OwnPtr sq_dma_region, NonnullRefPtrVector sq_dma_page, Memory::TypedMapping db_regs) { - auto queue = TRY(adopt_nonnull_ref_or_enomem(new (nothrow) NVMeQueue(qid, irq, q_depth, move(cq_dma_region), cq_dma_page, move(sq_dma_region), sq_dma_page, move(db_regs)))); - TRY(queue->create()); + // Note: Allocate DMA region for RW operation. For now the requests don't exceed more than 4096 bytes (Storage device takes care of it) + RefPtr rw_dma_page; + auto rw_dma_region = TRY(MM.allocate_dma_buffer_page("NVMe Queue Read/Write DMA"sv, Memory::Region::Access::ReadWrite, rw_dma_page)); + auto queue = TRY(adopt_nonnull_ref_or_enomem(new (nothrow) NVMeQueue(move(rw_dma_region), *rw_dma_page, qid, irq, q_depth, move(cq_dma_region), cq_dma_page, move(sq_dma_region), sq_dma_page, move(db_regs)))); return queue; } -UNMAP_AFTER_INIT NVMeQueue::NVMeQueue(u16 qid, u8 irq, u32 q_depth, OwnPtr cq_dma_region, NonnullRefPtrVector cq_dma_page, OwnPtr sq_dma_region, NonnullRefPtrVector sq_dma_page, Memory::TypedMapping db_regs) +UNMAP_AFTER_INIT NVMeQueue::NVMeQueue(NonnullOwnPtr rw_dma_region, Memory::PhysicalPage const& rw_dma_page, u16 qid, u8 irq, u32 q_depth, OwnPtr cq_dma_region, NonnullRefPtrVector cq_dma_page, OwnPtr sq_dma_region, NonnullRefPtrVector sq_dma_page, Memory::TypedMapping db_regs) : IRQHandler(irq) , m_qid(qid) , m_admin_queue(qid == 0) @@ -30,7 +32,9 @@ UNMAP_AFTER_INIT NVMeQueue::NVMeQueue(u16 qid, u8 irq, u32 q_depth, OwnPtr(m_cq_dma_region->vaddr().as_ptr()), m_qdepth }; } -UNMAP_AFTER_INIT ErrorOr NVMeQueue::create() -{ - // DMA region for RW operation. For now the requests don't exceed more than 4096 bytes(Storage device takes of it) - auto buffer = TRY(MM.allocate_dma_buffer_page("NVMe Queue"sv, Memory::Region::Access::ReadWrite, m_rw_dma_page)); - m_rw_dma_region = move(buffer); - return {}; -} - bool NVMeQueue::cqe_available() { return PHASE_TAG(m_cqe_array[m_cq_head].status) == m_cq_valid_phase; diff --git a/Kernel/Storage/NVMe/NVMeQueue.h b/Kernel/Storage/NVMe/NVMeQueue.h index fdec1be7a4..85dbd7ddc3 100644 --- a/Kernel/Storage/NVMe/NVMeQueue.h +++ b/Kernel/Storage/NVMe/NVMeQueue.h @@ -6,6 +6,7 @@ #pragma once +#include #include #include #include @@ -30,7 +31,6 @@ class NVMeQueue : public IRQHandler , public RefCounted { public: static ErrorOr> try_create(u16 qid, u8 irq, u32 q_depth, OwnPtr cq_dma_region, NonnullRefPtrVector cq_dma_page, OwnPtr sq_dma_region, NonnullRefPtrVector sq_dma_page, Memory::TypedMapping db_regs); - ErrorOr create(); bool is_admin_queue() { return m_admin_queue; }; void submit_sqe(NVMeSubmission&); u16 submit_sync_sqe(NVMeSubmission&); @@ -40,7 +40,7 @@ public: void disable_interrupts() { disable_irq(); }; private: - NVMeQueue(u16 qid, u8 irq, u32 q_depth, OwnPtr cq_dma_region, NonnullRefPtrVector cq_dma_page, OwnPtr sq_dma_region, NonnullRefPtrVector sq_dma_page, Memory::TypedMapping db_regs); + NVMeQueue(NonnullOwnPtr rw_dma_region, Memory::PhysicalPage const& rw_dma_page, u16 qid, u8 irq, u32 q_depth, OwnPtr cq_dma_region, NonnullRefPtrVector cq_dma_page, OwnPtr sq_dma_region, NonnullRefPtrVector sq_dma_page, Memory::TypedMapping db_regs); virtual bool handle_irq(const RegisterState&) override; @@ -73,9 +73,9 @@ private: OwnPtr m_sq_dma_region; NonnullRefPtrVector m_sq_dma_page; Span m_cqe_array; - OwnPtr m_rw_dma_region; + NonnullOwnPtr m_rw_dma_region; Memory::TypedMapping m_db_regs; - RefPtr m_rw_dma_page; + NonnullRefPtr m_rw_dma_page; Spinlock m_request_lock; RefPtr m_current_request; };