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https://github.com/SerenityOS/serenity
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Kernel: Make PageDirectory.h architecture specific
The page table and page directory formats are architecture specific, so move the headers into the Arch directory. Also move the aarch64 page table constants from aarch64/MMU.cpp to aarch64/PageDirectory.h.
This commit is contained in:
Timon Kruiper
Andreas Kling
parent
ad5e8bbb4f
commit
cdf59c86ac
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@ -1,156 +1,18 @@
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/*
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* Copyright (c) 2018-2021, Andreas Kling <kling@serenityos.org>
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* Copyright (c) 2022, Timon Kruiper <timonkruiper@gmail.com>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#pragma once
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#include <AK/Badge.h>
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#include <AK/Types.h>
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#include <Kernel/Forward.h>
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#include <Kernel/PhysicalAddress.h>
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#include <AK/Platform.h>
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namespace Kernel {
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class PageDirectoryEntry {
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public:
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PhysicalPtr page_table_base() const { return PhysicalAddress::physical_page_base(m_raw); }
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void set_page_table_base(u32 value)
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{
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m_raw &= 0x8000000000000fffULL;
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m_raw |= PhysicalAddress::physical_page_base(value);
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}
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bool is_null() const { return m_raw == 0; }
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void clear() { m_raw = 0; }
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u64 raw() const { return m_raw; }
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void copy_from(Badge<Memory::PageDirectory>, PageDirectoryEntry const& other) { m_raw = other.m_raw; }
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enum Flags {
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Present = 1 << 0,
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ReadWrite = 1 << 1,
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UserSupervisor = 1 << 2,
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WriteThrough = 1 << 3,
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CacheDisabled = 1 << 4,
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Huge = 1 << 7,
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Global = 1 << 8,
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NoExecute = 0x8000000000000000ULL,
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};
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bool is_present() const { return (raw() & Present) == Present; }
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void set_present(bool b) { set_bit(Present, b); }
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bool is_user_allowed() const { return (raw() & UserSupervisor) == UserSupervisor; }
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void set_user_allowed(bool b) { set_bit(UserSupervisor, b); }
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bool is_huge() const { return (raw() & Huge) == Huge; }
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void set_huge(bool b) { set_bit(Huge, b); }
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bool is_writable() const { return (raw() & ReadWrite) == ReadWrite; }
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void set_writable(bool b) { set_bit(ReadWrite, b); }
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bool is_write_through() const { return (raw() & WriteThrough) == WriteThrough; }
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void set_write_through(bool b) { set_bit(WriteThrough, b); }
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bool is_cache_disabled() const { return (raw() & CacheDisabled) == CacheDisabled; }
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void set_cache_disabled(bool b) { set_bit(CacheDisabled, b); }
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bool is_global() const { return (raw() & Global) == Global; }
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void set_global(bool b) { set_bit(Global, b); }
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bool is_execute_disabled() const { return (raw() & NoExecute) == NoExecute; }
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void set_execute_disabled(bool b) { set_bit(NoExecute, b); }
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private:
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void set_bit(u64 bit, bool value)
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{
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if (value)
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m_raw |= bit;
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else
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m_raw &= ~bit;
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}
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u64 m_raw;
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};
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class PageTableEntry {
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public:
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PhysicalPtr physical_page_base() const { return PhysicalAddress::physical_page_base(m_raw); }
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void set_physical_page_base(PhysicalPtr value)
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{
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// FIXME: IS THIS PLATFORM SPECIFIC?
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m_raw &= 0x8000000000000fffULL;
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m_raw |= PhysicalAddress::physical_page_base(value);
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}
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u64 raw() const { return m_raw; }
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enum Flags {
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Present = 1 << 0,
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ReadWrite = 1 << 1,
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UserSupervisor = 1 << 2,
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WriteThrough = 1 << 3,
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CacheDisabled = 1 << 4,
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PAT = 1 << 7,
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Global = 1 << 8,
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NoExecute = 0x8000000000000000ULL,
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};
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bool is_present() const { return (raw() & Present) == Present; }
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void set_present(bool b) { set_bit(Present, b); }
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bool is_user_allowed() const { return (raw() & UserSupervisor) == UserSupervisor; }
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void set_user_allowed(bool b) { set_bit(UserSupervisor, b); }
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bool is_writable() const { return (raw() & ReadWrite) == ReadWrite; }
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void set_writable(bool b) { set_bit(ReadWrite, b); }
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bool is_write_through() const { return (raw() & WriteThrough) == WriteThrough; }
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void set_write_through(bool b) { set_bit(WriteThrough, b); }
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bool is_cache_disabled() const { return (raw() & CacheDisabled) == CacheDisabled; }
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void set_cache_disabled(bool b) { set_bit(CacheDisabled, b); }
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bool is_global() const { return (raw() & Global) == Global; }
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void set_global(bool b) { set_bit(Global, b); }
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bool is_execute_disabled() const { return (raw() & NoExecute) == NoExecute; }
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void set_execute_disabled(bool b) { set_bit(NoExecute, b); }
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bool is_pat() const { return (raw() & PAT) == PAT; }
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void set_pat(bool b) { set_bit(PAT, b); }
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bool is_null() const { return m_raw == 0; }
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void clear() { m_raw = 0; }
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private:
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void set_bit(u64 bit, bool value)
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{
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if (value)
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m_raw |= bit;
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else
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m_raw &= ~bit;
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}
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u64 m_raw;
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};
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static_assert(AssertSize<PageDirectoryEntry, 8>());
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static_assert(AssertSize<PageTableEntry, 8>());
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class PageDirectoryPointerTable {
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public:
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PageDirectoryEntry* directory(size_t index)
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{
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VERIFY(index <= (NumericLimits<size_t>::max() << 30));
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return (PageDirectoryEntry*)(PhysicalAddress::physical_page_base(raw[index]));
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}
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u64 raw[512];
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};
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}
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#if ARCH(X86_64) || ARCH(I386)
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# include <Kernel/Arch/x86/PageDirectory.h>
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#elif ARCH(AARCH64)
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# include <Kernel/Arch/aarch64/PageDirectory.h>
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#else
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# error "Unknown architecture"
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#endif
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@ -8,6 +8,7 @@
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#include <Kernel/Arch/aarch64/CPU.h>
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#include <Kernel/Arch/PageDirectory.h>
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#include <Kernel/Arch/aarch64/ASM_wrapper.h>
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#include <Kernel/Arch/aarch64/RPi/MMIO.h>
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#include <Kernel/Arch/aarch64/RPi/UART.h>
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@ -27,26 +28,6 @@ namespace Kernel {
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constexpr u32 START_OF_NORMAL_MEMORY = 0x00000000;
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constexpr u32 END_OF_NORMAL_MEMORY = 0x3EFFFFFF;
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// 4KiB page size was chosen for the prekernel to make this code slightly simpler
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constexpr u32 GRANULE_SIZE = 0x1000;
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constexpr u32 PAGE_TABLE_SIZE = 0x1000;
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// Documentation for translation table format
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// https://developer.arm.com/documentation/101811/0101/Controlling-address-translation
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constexpr u32 PAGE_DESCRIPTOR = 0b11;
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constexpr u32 TABLE_DESCRIPTOR = 0b11;
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constexpr u32 DESCRIPTOR_MASK = ~0b11;
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constexpr u32 ACCESS_FLAG = 1 << 10;
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// shareability
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constexpr u32 OUTER_SHAREABLE = (2 << 8);
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constexpr u32 INNER_SHAREABLE = (3 << 8);
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// these index into the MAIR attribute table
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constexpr u32 NORMAL_MEMORY = (0 << 2);
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constexpr u32 DEVICE_MEMORY = (1 << 2);
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ALWAYS_INLINE static u64* descriptor_to_pointer(FlatPtr descriptor)
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{
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return (u64*)(descriptor & DESCRIPTOR_MASK);
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169
Kernel/Arch/aarch64/PageDirectory.h
Normal file
169
Kernel/Arch/aarch64/PageDirectory.h
Normal file
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@ -0,0 +1,169 @@
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/*
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* Copyright (c) 2018-2021, Andreas Kling <kling@serenityos.org>
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* Copyright (c) 2022, Timon Kruiper <timonkruiper@gmail.com>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#pragma once
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#include <AK/Badge.h>
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#include <AK/Types.h>
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#include <Kernel/Forward.h>
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#include <Kernel/PhysicalAddress.h>
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namespace Kernel {
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// 4KiB page size was chosen to make this code slightly simpler
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constexpr u32 GRANULE_SIZE = 0x1000;
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constexpr u32 PAGE_TABLE_SIZE = 0x1000;
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// Documentation for translation table format
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// https://developer.arm.com/documentation/101811/0101/Controlling-address-translation
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constexpr u32 PAGE_DESCRIPTOR = 0b11;
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constexpr u32 TABLE_DESCRIPTOR = 0b11;
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constexpr u32 DESCRIPTOR_MASK = ~0b11;
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constexpr u32 ACCESS_FLAG = 1 << 10;
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// shareability
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constexpr u32 OUTER_SHAREABLE = (2 << 8);
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constexpr u32 INNER_SHAREABLE = (3 << 8);
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// these index into the MAIR attribute table
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constexpr u32 NORMAL_MEMORY = (0 << 2);
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constexpr u32 DEVICE_MEMORY = (1 << 2);
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// Figure D5-15 of Arm Architecture Reference Manual Armv8 - page D5-2588
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class PageDirectoryEntry {
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public:
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PhysicalPtr page_table_base() const { return PhysicalAddress::physical_page_base(m_raw); }
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void set_page_table_base(u32 value)
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{
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m_raw &= 0xffff000000000fffULL;
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m_raw |= PhysicalAddress::physical_page_base(value);
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// FIXME: Do not hardcode this.
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m_raw |= TABLE_DESCRIPTOR;
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}
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bool is_null() const { return m_raw == 0; }
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void clear() { m_raw = 0; }
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u64 raw() const { return m_raw; }
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void copy_from(Badge<Memory::PageDirectory>, PageDirectoryEntry const& other) { m_raw = other.m_raw; }
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enum Flags {
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Present = 1 << 0,
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};
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bool is_present() const { return (raw() & Present) == Present; }
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void set_present(bool) { }
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bool is_user_allowed() const { VERIFY_NOT_REACHED(); }
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void set_user_allowed(bool) { }
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bool is_huge() const { VERIFY_NOT_REACHED(); }
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void set_huge(bool) { }
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bool is_writable() const { VERIFY_NOT_REACHED(); }
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void set_writable(bool) { }
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bool is_write_through() const { VERIFY_NOT_REACHED(); }
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void set_write_through(bool) { }
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bool is_cache_disabled() const { VERIFY_NOT_REACHED(); }
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void set_cache_disabled(bool) { }
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bool is_global() const { VERIFY_NOT_REACHED(); }
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void set_global(bool) { }
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bool is_execute_disabled() const { VERIFY_NOT_REACHED(); }
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void set_execute_disabled(bool) { }
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private:
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void set_bit(u64 bit, bool value)
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{
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if (value)
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m_raw |= bit;
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else
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m_raw &= ~bit;
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}
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u64 m_raw;
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};
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// Figure D5-17 VMSAv8-64 level 3 descriptor format of Arm Architecture Reference Manual Armv8 - page D5-2592
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class PageTableEntry {
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public:
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PhysicalPtr physical_page_base() const { return PhysicalAddress::physical_page_base(m_raw); }
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void set_physical_page_base(PhysicalPtr value)
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{
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m_raw &= 0xffff000000000fffULL;
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m_raw |= PhysicalAddress::physical_page_base(value);
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// FIXME: For now we map everything with the same permissions.
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u64 normal_memory_flags = ACCESS_FLAG | PAGE_DESCRIPTOR | INNER_SHAREABLE | NORMAL_MEMORY;
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m_raw |= normal_memory_flags;
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}
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u64 raw() const { return m_raw; }
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enum Flags {
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Present = 1 << 0,
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};
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bool is_present() const { return (raw() & Present) == Present; }
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void set_present(bool) { }
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bool is_user_allowed() const { VERIFY_NOT_REACHED(); }
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void set_user_allowed(bool) { }
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bool is_writable() const { VERIFY_NOT_REACHED(); }
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void set_writable(bool) { }
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bool is_write_through() const { VERIFY_NOT_REACHED(); }
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void set_write_through(bool) { }
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bool is_cache_disabled() const { VERIFY_NOT_REACHED(); }
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void set_cache_disabled(bool) { }
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bool is_global() const { VERIFY_NOT_REACHED(); }
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void set_global(bool) { }
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bool is_execute_disabled() const { VERIFY_NOT_REACHED(); }
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void set_execute_disabled(bool) { }
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bool is_pat() const { VERIFY_NOT_REACHED(); }
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void set_pat(bool) { }
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bool is_null() const { return m_raw == 0; }
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void clear() { m_raw = 0; }
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private:
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void set_bit(u64 bit, bool value)
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{
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if (value)
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m_raw |= bit;
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else
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m_raw &= ~bit;
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}
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u64 m_raw;
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};
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static_assert(AssertSize<PageDirectoryEntry, 8>());
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static_assert(AssertSize<PageTableEntry, 8>());
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class PageDirectoryPointerTable {
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public:
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PageDirectoryEntry* directory(size_t index)
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{
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VERIFY(index <= (NumericLimits<size_t>::max() << 30));
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return (PageDirectoryEntry*)(PhysicalAddress::physical_page_base(raw[index]));
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}
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u64 raw[512];
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};
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}
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154
Kernel/Arch/x86/PageDirectory.h
Normal file
154
Kernel/Arch/x86/PageDirectory.h
Normal file
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@ -0,0 +1,154 @@
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/*
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* Copyright (c) 2018-2021, Andreas Kling <kling@serenityos.org>
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*
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* SPDX-License-Identifier: BSD-2-Clause
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*/
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#pragma once
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#include <AK/Badge.h>
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#include <AK/Types.h>
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#include <Kernel/Forward.h>
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#include <Kernel/PhysicalAddress.h>
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namespace Kernel {
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class PageDirectoryEntry {
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public:
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PhysicalPtr page_table_base() const { return PhysicalAddress::physical_page_base(m_raw); }
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void set_page_table_base(u32 value)
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{
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m_raw &= 0x8000000000000fffULL;
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m_raw |= PhysicalAddress::physical_page_base(value);
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}
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bool is_null() const { return m_raw == 0; }
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void clear() { m_raw = 0; }
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u64 raw() const { return m_raw; }
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void copy_from(Badge<Memory::PageDirectory>, PageDirectoryEntry const& other) { m_raw = other.m_raw; }
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enum Flags {
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Present = 1 << 0,
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ReadWrite = 1 << 1,
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UserSupervisor = 1 << 2,
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WriteThrough = 1 << 3,
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CacheDisabled = 1 << 4,
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Huge = 1 << 7,
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Global = 1 << 8,
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NoExecute = 0x8000000000000000ULL,
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};
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bool is_present() const { return (raw() & Present) == Present; }
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void set_present(bool b) { set_bit(Present, b); }
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bool is_user_allowed() const { return (raw() & UserSupervisor) == UserSupervisor; }
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void set_user_allowed(bool b) { set_bit(UserSupervisor, b); }
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bool is_huge() const { return (raw() & Huge) == Huge; }
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void set_huge(bool b) { set_bit(Huge, b); }
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bool is_writable() const { return (raw() & ReadWrite) == ReadWrite; }
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void set_writable(bool b) { set_bit(ReadWrite, b); }
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bool is_write_through() const { return (raw() & WriteThrough) == WriteThrough; }
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void set_write_through(bool b) { set_bit(WriteThrough, b); }
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bool is_cache_disabled() const { return (raw() & CacheDisabled) == CacheDisabled; }
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void set_cache_disabled(bool b) { set_bit(CacheDisabled, b); }
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bool is_global() const { return (raw() & Global) == Global; }
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void set_global(bool b) { set_bit(Global, b); }
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bool is_execute_disabled() const { return (raw() & NoExecute) == NoExecute; }
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void set_execute_disabled(bool b) { set_bit(NoExecute, b); }
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private:
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void set_bit(u64 bit, bool value)
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{
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if (value)
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m_raw |= bit;
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else
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m_raw &= ~bit;
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}
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u64 m_raw;
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};
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class PageTableEntry {
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public:
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PhysicalPtr physical_page_base() const { return PhysicalAddress::physical_page_base(m_raw); }
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void set_physical_page_base(PhysicalPtr value)
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{
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// FIXME: IS THIS PLATFORM SPECIFIC?
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m_raw &= 0x8000000000000fffULL;
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m_raw |= PhysicalAddress::physical_page_base(value);
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}
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u64 raw() const { return m_raw; }
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enum Flags {
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Present = 1 << 0,
|
||||
ReadWrite = 1 << 1,
|
||||
UserSupervisor = 1 << 2,
|
||||
WriteThrough = 1 << 3,
|
||||
CacheDisabled = 1 << 4,
|
||||
PAT = 1 << 7,
|
||||
Global = 1 << 8,
|
||||
NoExecute = 0x8000000000000000ULL,
|
||||
};
|
||||
|
||||
bool is_present() const { return (raw() & Present) == Present; }
|
||||
void set_present(bool b) { set_bit(Present, b); }
|
||||
|
||||
bool is_user_allowed() const { return (raw() & UserSupervisor) == UserSupervisor; }
|
||||
void set_user_allowed(bool b) { set_bit(UserSupervisor, b); }
|
||||
|
||||
bool is_writable() const { return (raw() & ReadWrite) == ReadWrite; }
|
||||
void set_writable(bool b) { set_bit(ReadWrite, b); }
|
||||
|
||||
bool is_write_through() const { return (raw() & WriteThrough) == WriteThrough; }
|
||||
void set_write_through(bool b) { set_bit(WriteThrough, b); }
|
||||
|
||||
bool is_cache_disabled() const { return (raw() & CacheDisabled) == CacheDisabled; }
|
||||
void set_cache_disabled(bool b) { set_bit(CacheDisabled, b); }
|
||||
|
||||
bool is_global() const { return (raw() & Global) == Global; }
|
||||
void set_global(bool b) { set_bit(Global, b); }
|
||||
|
||||
bool is_execute_disabled() const { return (raw() & NoExecute) == NoExecute; }
|
||||
void set_execute_disabled(bool b) { set_bit(NoExecute, b); }
|
||||
|
||||
bool is_pat() const { return (raw() & PAT) == PAT; }
|
||||
void set_pat(bool b) { set_bit(PAT, b); }
|
||||
|
||||
bool is_null() const { return m_raw == 0; }
|
||||
void clear() { m_raw = 0; }
|
||||
|
||||
private:
|
||||
void set_bit(u64 bit, bool value)
|
||||
{
|
||||
if (value)
|
||||
m_raw |= bit;
|
||||
else
|
||||
m_raw &= ~bit;
|
||||
}
|
||||
|
||||
u64 m_raw;
|
||||
};
|
||||
|
||||
static_assert(AssertSize<PageDirectoryEntry, 8>());
|
||||
static_assert(AssertSize<PageTableEntry, 8>());
|
||||
|
||||
class PageDirectoryPointerTable {
|
||||
public:
|
||||
PageDirectoryEntry* directory(size_t index)
|
||||
{
|
||||
VERIFY(index <= (NumericLimits<size_t>::max() << 30));
|
||||
return (PageDirectoryEntry*)(PhysicalAddress::physical_page_base(raw[index]));
|
||||
}
|
||||
|
||||
u64 raw[512];
|
||||
};
|
||||
|
||||
}
|
||||
Loading…
Reference in a new issue