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Kernel: Use the new API to query and map BAR spaces in most places

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This might be a bit overkill in some instances, but it's nice to be
consistent
This commit is contained in:
Hendiadyoin1 2024-01-11 23:58:36 +01:00 committed by Andrew Kaster
parent c65455e122
commit 2dc20f9e39
7 changed files with 28 additions and 26 deletions
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3
Kernel/Bus/PCI/Controller/VolumeManagementDevice.cpp
View file

@ -7,6 +7,7 @@
#include <AK/ByteReader.h>
#include <Kernel/Bus/PCI/API.h>
#include <Kernel/Bus/PCI/Access.h>
#include <Kernel/Bus/PCI/BarMapping.h>
#include <Kernel/Bus/PCI/Controller/VolumeManagementDevice.h>
namespace Kernel::PCI {
@ -36,7 +37,7 @@ NonnullOwnPtr<VolumeManagementDevice> VolumeManagementDevice::must_create(PCI::D
// resource size of BAR0.
dbgln("VMD Host bridge @ {}: Start bus at {}, end bus {}", device_identifier.address(), start_bus, 0xff);
PCI::Domain domain { s_vmd_pci_domain_number++, start_bus, 0xff };
auto start_address = PhysicalAddress(PCI::get_BAR0(device_identifier)).page_base();
auto start_address = PCI::get_bar_address(device_identifier, PCI::HeaderType0BaseRegister::BAR0).release_value_but_fixme_should_propagate_errors();
return adopt_own_if_nonnull(new (nothrow) VolumeManagementDevice(domain, start_address)).release_nonnull();
}

10
Kernel/Bus/USB/EHCI/EHCIController.cpp
View file

@ -5,6 +5,7 @@
*/
#include <Kernel/Bus/PCI/API.h>
#include <Kernel/Bus/PCI/BarMapping.h>
#include <Kernel/Bus/USB/EHCI/EHCIController.h>
namespace Kernel::USB::EHCI {
@ -13,14 +14,9 @@ ErrorOr<NonnullLockRefPtr<EHCIController>> EHCIController::try_to_initialize(con
{
// FIXME: This assumes the BIOS left us a physical region for the controller
u64 pci_bar_value = PCI::get_BAR(pci_device_identifier, SpaceBaseAddressRegister);
auto pci_bar_space_type = PCI::get_BAR_space_type(pci_bar_value);
if (pci_bar_space_type == PCI::BARSpaceType::Memory64BitSpace) {
u64 next_pci_bar_value = PCI::get_BAR(pci_device_identifier, static_cast<PCI::HeaderType0BaseRegister>(to_underlying(SpaceBaseAddressRegister) + 1));
pci_bar_value |= next_pci_bar_value << 32;
}
auto pci_bar_address = TRY(PCI::get_bar_address(pci_device_identifier, SpaceBaseAddressRegister));
auto pci_bar_space_size = PCI::get_BAR_space_size(pci_device_identifier, SpaceBaseAddressRegister);
auto register_region = TRY(MM.allocate_kernel_region(PhysicalAddress { pci_bar_value }, pci_bar_space_size, {}, Memory::Region::Access::ReadWrite));
auto register_region = TRY(MM.allocate_kernel_region(pci_bar_address, pci_bar_space_size, {}, Memory::Region::Access::ReadWrite));
PCI::enable_bus_mastering(pci_device_identifier);
PCI::enable_memory_space(pci_device_identifier);

9
Kernel/Devices/GPU/3dfx/GraphicsAdapter.cpp
View file

@ -5,6 +5,7 @@
*/
#include <Kernel/Bus/PCI/API.h>
#include <Kernel/Bus/PCI/BarMapping.h>
#include <Kernel/Bus/PCI/IDs.h>
#include <Kernel/Devices/GPU/3dfx/Definitions.h>
#include <Kernel/Devices/GPU/3dfx/GraphicsAdapter.h>
@ -50,12 +51,10 @@ UNMAP_AFTER_INIT ErrorOr<void> VoodooGraphicsAdapter::initialize_adapter(PCI::De
PCI::enable_io_space(device_identifier());
PCI::enable_memory_space(device_identifier());
auto mmio_addr = PhysicalAddress(PCI::get_BAR0(pci_device_identifier) & PCI::bar_address_mask);
auto mmio_size = PCI::get_BAR_space_size(pci_device_identifier, PCI::HeaderType0BaseRegister::BAR0);
dbgln_if(TDFX_DEBUG, "3dfx mmio addr {} size {}", mmio_addr, mmio_size);
auto mmio_mapping = TRY(Memory::map_typed<VoodooGraphics::RegisterMap volatile>(mmio_addr, mmio_size, Memory::Region::Access::Read | Memory::Region::Access::Write));
auto mmio_mapping = TRY(PCI::map_bar<VoodooGraphics::RegisterMap volatile>(pci_device_identifier, PCI::HeaderType0BaseRegister::BAR0));
dbgln_if(TDFX_DEBUG, "3dfx mmio addr {} size {}", mmio_mapping.paddr, mmio_mapping.length);
auto vmem_addr = PhysicalAddress(PCI::get_BAR1(pci_device_identifier) & PCI::bar_address_mask);
auto vmem_addr = TRY(PCI::get_bar_address(pci_device_identifier, PCI::HeaderType0BaseRegister::BAR1));
auto vmem_size = PCI::get_BAR_space_size(pci_device_identifier, PCI::HeaderType0BaseRegister::BAR1);
dbgln_if(TDFX_DEBUG, "3dfx vmem addr {} size {}", vmem_addr, vmem_size);

11
Kernel/Devices/GPU/Bochs/GraphicsAdapter.cpp
View file

@ -11,6 +11,7 @@
# include <Kernel/Arch/x86_64/Hypervisor/BochsDisplayConnector.h>
#endif
#include <Kernel/Bus/PCI/API.h>
#include <Kernel/Bus/PCI/BarMapping.h>
#include <Kernel/Bus/PCI/IDs.h>
#include <Kernel/Devices/GPU/Bochs/Definitions.h>
#include <Kernel/Devices/GPU/Bochs/GraphicsAdapter.h>
@ -56,16 +57,16 @@ UNMAP_AFTER_INIT ErrorOr<void> BochsGraphicsAdapter::initialize_adapter(PCI::Dev
#if ARCH(X86_64)
bool virtual_box_hardware = (pci_device_identifier.hardware_id().vendor_id == 0x80ee && pci_device_identifier.hardware_id().device_id == 0xbeef);
if (pci_device_identifier.revision_id().value() == 0x0 || virtual_box_hardware) {
m_display_connector = BochsDisplayConnector::must_create(PhysicalAddress(PCI::get_BAR0(pci_device_identifier) & PCI::bar_address_mask), bar0_space_size, virtual_box_hardware);
m_display_connector = BochsDisplayConnector::must_create(PhysicalAddress(TRY(PCI::get_bar_address(pci_device_identifier, PCI::HeaderType0BaseRegister::BAR0))), bar0_space_size, virtual_box_hardware);
} else {
auto registers_mapping = TRY(Memory::map_typed_writable<BochsDisplayMMIORegisters volatile>(PhysicalAddress(PCI::get_BAR2(pci_device_identifier) & PCI::bar_address_mask)));
auto registers_mapping = TRY(PCI::map_bar<BochsDisplayMMIORegisters volatile>(pci_device_identifier, PCI::HeaderType0BaseRegister::BAR2));
VERIFY(registers_mapping.region);
m_display_connector = QEMUDisplayConnector::must_create(PhysicalAddress(PCI::get_BAR0(pci_device_identifier) & PCI::bar_address_mask), bar0_space_size, move(registers_mapping));
m_display_connector = QEMUDisplayConnector::must_create(PhysicalAddress(TRY(PCI::get_bar_address(pci_device_identifier, PCI::HeaderType0BaseRegister::BAR0))), bar0_space_size, move(registers_mapping));
}
#else
auto registers_mapping = TRY(Memory::map_typed_writable<BochsDisplayMMIORegisters volatile>(PhysicalAddress(PCI::get_BAR2(pci_device_identifier) & PCI::bar_address_mask)));
auto registers_mapping = TRY(PCI::map_bar<BochsDisplayMMIORegisters volatile>(pci_device_identifier, PCI::HeaderType0BaseRegister::BAR2));
VERIFY(registers_mapping.region);
m_display_connector = QEMUDisplayConnector::must_create(PhysicalAddress(PCI::get_BAR0(pci_device_identifier) & PCI::bar_address_mask), bar0_space_size, move(registers_mapping));
m_display_connector = QEMUDisplayConnector::must_create(PhysicalAddress(TRY(PCI::get_bar_address(pci_device_identifier, PCI::HeaderType0BaseRegister::BAR0))), bar0_space_size, move(registers_mapping));
#endif
// Note: According to Gerd Hoffmann - "The linux driver simply does

11
Kernel/Devices/GPU/Intel/NativeGraphicsAdapter.cpp
View file

@ -5,6 +5,7 @@
*/
#include <Kernel/Bus/PCI/API.h>
#include <Kernel/Bus/PCI/BarMapping.h>
#include <Kernel/Devices/GPU/Console/ContiguousFramebufferConsole.h>
#include <Kernel/Devices/GPU/Definitions.h>
#include <Kernel/Devices/GPU/Intel/NativeGraphicsAdapter.h>
@ -42,13 +43,15 @@ ErrorOr<void> IntelNativeGraphicsAdapter::initialize_adapter()
{
dbgln_if(INTEL_GRAPHICS_DEBUG, "Intel Native Graphics Adapter @ {}", device_identifier().address());
auto bar0_space_size = PCI::get_BAR_space_size(device_identifier(), PCI::HeaderType0BaseRegister::BAR0);
auto bar0_space_address = TRY(PCI::get_bar_address(device_identifier(), PCI::HeaderType0BaseRegister::BAR0));
auto bar2_space_size = PCI::get_BAR_space_size(device_identifier(), PCI::HeaderType0BaseRegister::BAR2);
dmesgln_pci(*this, "MMIO @ {}, space size is {:x} bytes", PhysicalAddress(PCI::get_BAR0(device_identifier())), bar0_space_size);
dmesgln_pci(*this, "framebuffer @ {}", PhysicalAddress(PCI::get_BAR2(device_identifier())));
auto bar2_space_address = TRY(PCI::get_bar_address(device_identifier(), PCI::HeaderType0BaseRegister::BAR2));
dmesgln_pci(*this, "MMIO @ {}, space size is {:x} bytes", bar0_space_address, bar0_space_size);
dmesgln_pci(*this, "framebuffer @ {}", bar2_space_address);
using MMIORegion = IntelDisplayConnectorGroup::MMIORegion;
MMIORegion first_region { MMIORegion::BARAssigned::BAR0, PhysicalAddress(PCI::get_BAR0(device_identifier()) & PCI::bar_address_mask), bar0_space_size };
MMIORegion second_region { MMIORegion::BARAssigned::BAR2, PhysicalAddress(PCI::get_BAR2(device_identifier()) & PCI::bar_address_mask), bar2_space_size };
MMIORegion first_region { MMIORegion::BARAssigned::BAR0, bar0_space_address, bar0_space_size };
MMIORegion second_region { MMIORegion::BARAssigned::BAR2, bar2_space_address, bar2_space_size };
PCI::enable_bus_mastering(device_identifier());
PCI::enable_io_space(device_identifier());

7
Kernel/Devices/GPU/VMWare/GraphicsAdapter.cpp
View file

@ -8,6 +8,7 @@
#include <AK/Checked.h>
#include <AK/Try.h>
#include <Kernel/Bus/PCI/API.h>
#include <Kernel/Bus/PCI/BarMapping.h>
#include <Kernel/Bus/PCI/IDs.h>
#include <Kernel/Devices/GPU/Console/ContiguousFramebufferConsole.h>
#include <Kernel/Devices/GPU/Management.h>
@ -69,7 +70,7 @@ UNMAP_AFTER_INIT ErrorOr<void> VMWareGraphicsAdapter::initialize_fifo_registers(
{
auto framebuffer_size = read_io_register(VMWareDisplayRegistersOffset::FB_SIZE);
auto fifo_size = read_io_register(VMWareDisplayRegistersOffset::MEM_SIZE);
auto fifo_physical_address = PhysicalAddress(PCI::get_BAR2(device_identifier()) & PCI::bar_address_mask);
auto fifo_physical_address = TRY(PCI::get_bar_address(device_identifier(), PCI::HeaderType0BaseRegister::BAR2));
dbgln("VMWare SVGA @ {}: framebuffer size {} bytes, FIFO size {} bytes @ {}", device_identifier().address(), framebuffer_size, fifo_size, fifo_physical_address);
if (framebuffer_size < 0x100000 || fifo_size < 0x10000) {
@ -77,7 +78,7 @@ UNMAP_AFTER_INIT ErrorOr<void> VMWareGraphicsAdapter::initialize_fifo_registers(
return Error::from_errno(ENOTSUP);
}
m_fifo_registers = TRY(Memory::map_typed<VMWareDisplayFIFORegisters volatile>(fifo_physical_address, fifo_size, Memory::Region::Access::ReadWrite));
m_fifo_registers = TRY(PCI::map_bar<VMWareDisplayFIFORegisters volatile>(device_identifier(), PCI::HeaderType0BaseRegister::BAR2, fifo_size));
m_fifo_registers->start = 16;
m_fifo_registers->size = 16 + (10 * 1024);
m_fifo_registers->next_command = 16;
@ -185,7 +186,7 @@ UNMAP_AFTER_INIT ErrorOr<void> VMWareGraphicsAdapter::initialize_adapter()
auto bar1_space_size = PCI::get_BAR_space_size(device_identifier(), PCI::HeaderType0BaseRegister::BAR1);
m_display_connector = VMWareDisplayConnector::must_create(*this, PhysicalAddress(PCI::get_BAR1(device_identifier()) & PCI::bar_address_mask), bar1_space_size);
m_display_connector = VMWareDisplayConnector::must_create(*this, TRY(PCI::get_bar_address(device_identifier(), PCI::HeaderType0BaseRegister::BAR1)), bar1_space_size);
TRY(m_display_connector->set_safe_mode_setting());
return {};
}

3
Kernel/Devices/Storage/ATA/AHCI/Controller.cpp
View file

@ -11,6 +11,7 @@
#include <Kernel/Arch/Delay.h>
#include <Kernel/Boot/CommandLine.h>
#include <Kernel/Bus/PCI/API.h>
#include <Kernel/Bus/PCI/BarMapping.h>
#include <Kernel/Devices/Storage/ATA/AHCI/Controller.h>
#include <Kernel/Devices/Storage/ATA/AHCI/InterruptHandler.h>
#include <Kernel/Library/LockRefPtr.h>
@ -154,7 +155,7 @@ UNMAP_AFTER_INIT AHCI::HBADefinedCapabilities AHCIController::capabilities() con
UNMAP_AFTER_INIT ErrorOr<Memory::TypedMapping<AHCI::HBA volatile>> AHCIController::map_default_hba_region(PCI::DeviceIdentifier const& pci_device_identifier)
{
return Memory::map_typed_writable<AHCI::HBA volatile>(PhysicalAddress(PCI::get_BAR5(pci_device_identifier)));
return PCI::map_bar<AHCI::HBA volatile>(pci_device_identifier, PCI::HeaderType0BaseRegister::BAR5);
}
AHCIController::~AHCIController() = default;