mirror of
https://github.com/SerenityOS/serenity
synced 2024-09-06 17:06:31 +00:00
Revert "Kernel/PCI: Allow to set the PCI IRQ line of a device"
This reverts commit 36a82188a8
.
This register is write-only for the firmware (BIOS), and read-only for
us so we shouldn't set the PCI IRQ line never.
The firmware figured out the IRQ routing to the PIC for us, so changing
it won't affect anything. I was mistaken when I thought that changing
the value of this register will allow us to change its interrupt line,
like when changing a PCI BAR to relocate device resources as desired
with the requirements of the OS.
This commit is contained in:
parent
2718d7c74c
commit
27bf91ab87
|
@ -222,11 +222,6 @@ u8 get_interrupt_line(Address address)
|
|||
return read8(address, PCI_INTERRUPT_LINE);
|
||||
}
|
||||
|
||||
void set_interrupt_line(Address address, u8 new_line)
|
||||
{
|
||||
write8(address, PCI_INTERRUPT_LINE, new_line);
|
||||
}
|
||||
|
||||
u32 get_BAR0(Address address)
|
||||
{
|
||||
return read32(address, PCI_BAR0);
|
||||
|
|
|
@ -204,7 +204,6 @@ void enumerate(Function<void(Address, ID)> callback);
|
|||
void enable_interrupt_line(Address);
|
||||
void disable_interrupt_line(Address);
|
||||
u8 get_interrupt_line(Address);
|
||||
void set_interrupt_line(Address, u8);
|
||||
void raw_access(Address, u32, size_t, u32);
|
||||
u32 get_BAR0(Address);
|
||||
u32 get_BAR1(Address);
|
||||
|
|
Loading…
Reference in a new issue