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Kernel/USB: Handle non-page aligned EHCI controller BARs correctly

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BARs don't have to be page-aligned. This patch correctly calculates the
needed memory range and register base address in that region.
This commit is contained in:
Sönke Holz 2024-02-18 18:26:42 +01:00 committed by Andreas Kling
parent 9968c9f7a6
commit 06a32b6e16
2 changed files with 10 additions and 6 deletions
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14
Kernel/Bus/USB/EHCI/EHCIController.cpp
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@ -16,24 +16,28 @@ ErrorOr<NonnullLockRefPtr<EHCIController>> EHCIController::try_to_initialize(con
// FIXME: This assumes the BIOS left us a physical region for the controller // FIXME: This assumes the BIOS left us a physical region for the controller
auto pci_bar_address = TRY(PCI::get_bar_address(pci_device_identifier, SpaceBaseAddressRegister)); auto pci_bar_address = TRY(PCI::get_bar_address(pci_device_identifier, SpaceBaseAddressRegister));
auto pci_bar_space_size = PCI::get_BAR_space_size(pci_device_identifier, SpaceBaseAddressRegister); auto pci_bar_space_size = PCI::get_BAR_space_size(pci_device_identifier, SpaceBaseAddressRegister);
auto register_region = TRY(MM.allocate_kernel_region(pci_bar_address, pci_bar_space_size, {}, Memory::Region::Access::ReadWrite));
auto register_region_size = TRY(Memory::page_round_up(pci_bar_address.offset_in_page() + pci_bar_space_size));
auto register_region = TRY(MM.allocate_kernel_region(pci_bar_address.page_base(), register_region_size, {}, Memory::Region::Access::ReadWrite));
VirtualAddress register_base_address = register_region->vaddr().offset(pci_bar_address.offset_in_page());
PCI::enable_bus_mastering(pci_device_identifier); PCI::enable_bus_mastering(pci_device_identifier);
PCI::enable_memory_space(pci_device_identifier); PCI::enable_memory_space(pci_device_identifier);
auto controller = TRY(adopt_nonnull_lock_ref_or_enomem(new (nothrow) EHCIController(pci_device_identifier, move(register_region)))); auto controller = TRY(adopt_nonnull_lock_ref_or_enomem(new (nothrow) EHCIController(pci_device_identifier, move(register_region), register_base_address)));
TRY(controller->initialize()); TRY(controller->initialize());
return controller; return controller;
} }
EHCIController::EHCIController(PCI::DeviceIdentifier const& pci_device_identifier, NonnullOwnPtr<Memory::Region> register_region) EHCIController::EHCIController(PCI::DeviceIdentifier const& pci_device_identifier, NonnullOwnPtr<Memory::Region> register_region, VirtualAddress register_base_address)
: PCI::Device(pci_device_identifier) : PCI::Device(pci_device_identifier)
, m_register_region(move(register_region)) , m_register_region(move(register_region))
{ {
m_cap_regs = bit_cast<CapabilityRegisters const*>(m_register_region->vaddr().get()); m_cap_regs = bit_cast<CapabilityRegisters const*>(register_base_address.get());
m_op_regs = bit_cast<OperationalRegisters volatile*>(m_register_region->vaddr().get() + m_cap_regs->capability_length); m_op_regs = bit_cast<OperationalRegisters volatile*>(register_base_address.get() + m_cap_regs->capability_length);
} }
ErrorOr<void> EHCIController::initialize() ErrorOr<void> EHCIController::initialize()

2
Kernel/Bus/USB/EHCI/EHCIController.h
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@ -36,7 +36,7 @@ public:
virtual ErrorOr<void> submit_async_interrupt_transfer(NonnullLockRefPtr<Transfer>, u16) override { return ENOTSUP; } virtual ErrorOr<void> submit_async_interrupt_transfer(NonnullLockRefPtr<Transfer>, u16) override { return ENOTSUP; }
private: private:
EHCIController(PCI::DeviceIdentifier const& pci_device_identifier, NonnullOwnPtr<Memory::Region> register_region); EHCIController(PCI::DeviceIdentifier const& pci_device_identifier, NonnullOwnPtr<Memory::Region> register_region, VirtualAddress register_base_address);
NonnullOwnPtr<Memory::Region> m_register_region; NonnullOwnPtr<Memory::Region> m_register_region;
CapabilityRegisters const* m_cap_regs; CapabilityRegisters const* m_cap_regs;