mirror of
https://gitlab.com/qemu-project/qemu
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75ac231c67
Before this commit, there were contradictory descriptions about size of EFER register. Line 113 says the size is 8 bytes. Line 129 says the size is 4 bytes. As a result, when GDB is debugging an OS running on QEMU, the GDB cannot read 'g' packets correctly. This 'g' packet transmits values of each registers of machine emulated by QEMU to GDB. QEMU, the packet sender, assign 4 bytes for EFER in 'g' packet based on the line 113. GDB, the packet receiver, extract 8 bytes for EFER in 'g' packet based on the line 129. Therefore, all registers located behind EFER in 'g' packet has been shifted 4 bytes in GDB. After this commit, GDB can read 'g' packets correctly. Signed-off-by: TaiseiIto <taisei1212@outlook.jp> Message-Id: <TY0PR0101MB4285F637209075C9F65FCDA6A4479@TY0PR0101MB4285.apcprd01.prod.exchangelabs.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
192 lines
7.2 KiB
XML
192 lines
7.2 KiB
XML
<?xml version="1.0"?>
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<!-- Copyright (C) 2010-2017 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved. -->
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<!-- I386 with SSE -->
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<!DOCTYPE target SYSTEM "gdb-target.dtd">
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<feature name="org.gnu.gdb.i386.core">
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<flags id="i386_eflags" size="4">
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<field name="" start="22" end="31"/>
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<field name="ID" start="21" end="21"/>
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<field name="VIP" start="20" end="20"/>
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<field name="VIF" start="19" end="19"/>
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<field name="AC" start="18" end="18"/>
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<field name="VM" start="17" end="17"/>
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<field name="RF" start="16" end="16"/>
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<field name="" start="15" end="15"/>
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<field name="NT" start="14" end="14"/>
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<field name="IOPL" start="12" end="13"/>
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<field name="OF" start="11" end="11"/>
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<field name="DF" start="10" end="10"/>
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<field name="IF" start="9" end="9"/>
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<field name="TF" start="8" end="8"/>
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<field name="SF" start="7" end="7"/>
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<field name="ZF" start="6" end="6"/>
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<field name="" start="5" end="5"/>
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<field name="AF" start="4" end="4"/>
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<field name="" start="3" end="3"/>
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<field name="PF" start="2" end="2"/>
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<field name="" start="1" end="1"/>
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<field name="CF" start="0" end="0"/>
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</flags>
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<reg name="eax" bitsize="32" type="int32" regnum="0"/>
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<reg name="ecx" bitsize="32" type="int32"/>
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<reg name="edx" bitsize="32" type="int32"/>
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<reg name="ebx" bitsize="32" type="int32"/>
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<reg name="esp" bitsize="32" type="data_ptr"/>
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<reg name="ebp" bitsize="32" type="data_ptr"/>
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<reg name="esi" bitsize="32" type="int32"/>
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<reg name="edi" bitsize="32" type="int32"/>
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<reg name="eip" bitsize="32" type="code_ptr"/>
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<reg name="eflags" bitsize="32" type="i386_eflags"/>
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<reg name="cs" bitsize="32" type="int32"/>
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<reg name="ss" bitsize="32" type="int32"/>
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<reg name="ds" bitsize="32" type="int32"/>
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<reg name="es" bitsize="32" type="int32"/>
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<reg name="fs" bitsize="32" type="int32"/>
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<reg name="gs" bitsize="32" type="int32"/>
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<!-- Segment descriptor caches and TLS base MSRs -->
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<!--reg name="cs_base" bitsize="32" type="int32"/>
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<reg name="ss_base" bitsize="32" type="int32"/>
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<reg name="ds_base" bitsize="32" type="int32"/>
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<reg name="es_base" bitsize="32" type="int32"/-->
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<reg name="fs_base" bitsize="32" type="int32"/>
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<reg name="gs_base" bitsize="32" type="int32"/>
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<reg name="k_gs_base" bitsize="32" type="int32"/>
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<flags id="i386_cr0" size="4">
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<field name="PG" start="31" end="31"/>
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<field name="CD" start="30" end="30"/>
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<field name="NW" start="29" end="29"/>
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<field name="AM" start="18" end="18"/>
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<field name="WP" start="16" end="16"/>
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<field name="NE" start="5" end="5"/>
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<field name="ET" start="4" end="4"/>
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<field name="TS" start="3" end="3"/>
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<field name="EM" start="2" end="2"/>
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<field name="MP" start="1" end="1"/>
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<field name="PE" start="0" end="0"/>
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</flags>
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<flags id="i386_cr3" size="4">
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<field name="PDBR" start="12" end="31"/>
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<!--field name="" start="3" end="11"/>
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<field name="WT" start="2" end="2"/>
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<field name="CD" start="1" end="1"/>
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<field name="" start="0" end="0"/-->
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<field name="PCID" start="0" end="11"/>
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</flags>
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<flags id="i386_cr4" size="4">
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<field name="VME" start="0" end="0"/>
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<field name="PVI" start="1" end="1"/>
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<field name="TSD" start="2" end="2"/>
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<field name="DE" start="3" end="3"/>
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<field name="PSE" start="4" end="4"/>
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<field name="PAE" start="5" end="5"/>
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<field name="MCE" start="6" end="6"/>
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<field name="PGE" start="7" end="7"/>
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<field name="PCE" start="8" end="8"/>
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<field name="OSFXSR" start="9" end="9"/>
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<field name="OSXMMEXCPT" start="10" end="10"/>
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<field name="UMIP" start="11" end="11"/>
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<field name="LA57" start="12" end="12"/>
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<field name="VMXE" start="13" end="13"/>
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<field name="SMXE" start="14" end="14"/>
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<field name="FSGSBASE" start="16" end="16"/>
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<field name="PCIDE" start="17" end="17"/>
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<field name="OSXSAVE" start="18" end="18"/>
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<field name="SMEP" start="20" end="20"/>
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<field name="SMAP" start="21" end="21"/>
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<field name="PKE" start="22" end="22"/>
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</flags>
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<flags id="i386_efer" size="4">
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<field name="TCE" start="15" end="15"/>
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<field name="FFXSR" start="14" end="14"/>
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<field name="LMSLE" start="13" end="13"/>
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<field name="SVME" start="12" end="12"/>
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<field name="NXE" start="11" end="11"/>
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<field name="LMA" start="10" end="10"/>
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<field name="LME" start="8" end="8"/>
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<field name="SCE" start="0" end="0"/>
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</flags>
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<reg name="cr0" bitsize="32" type="i386_cr0"/>
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<reg name="cr2" bitsize="32" type="int32"/>
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<reg name="cr3" bitsize="32" type="i386_cr3"/>
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<reg name="cr4" bitsize="32" type="i386_cr4"/>
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<reg name="cr8" bitsize="32" type="int32"/>
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<reg name="efer" bitsize="32" type="i386_efer"/>
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<reg name="st0" bitsize="80" type="i387_ext"/>
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<reg name="st1" bitsize="80" type="i387_ext"/>
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<reg name="st2" bitsize="80" type="i387_ext"/>
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<reg name="st3" bitsize="80" type="i387_ext"/>
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<reg name="st4" bitsize="80" type="i387_ext"/>
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<reg name="st5" bitsize="80" type="i387_ext"/>
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<reg name="st6" bitsize="80" type="i387_ext"/>
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<reg name="st7" bitsize="80" type="i387_ext"/>
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<reg name="fctrl" bitsize="32" type="int" group="float"/>
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<reg name="fstat" bitsize="32" type="int" group="float"/>
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<reg name="ftag" bitsize="32" type="int" group="float"/>
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<reg name="fiseg" bitsize="32" type="int" group="float"/>
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<reg name="fioff" bitsize="32" type="int" group="float"/>
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<reg name="foseg" bitsize="32" type="int" group="float"/>
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<reg name="fooff" bitsize="32" type="int" group="float"/>
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<reg name="fop" bitsize="32" type="int" group="float"/>
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<!--/feature>
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<feature name="org.gnu.gdb.i386.32bit.sse"-->
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<vector id="v4f" type="ieee_single" count="4"/>
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<vector id="v2d" type="ieee_double" count="2"/>
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<vector id="v16i8" type="int8" count="16"/>
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<vector id="v8i16" type="int16" count="8"/>
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<vector id="v4i32" type="int32" count="4"/>
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<vector id="v2i64" type="int64" count="2"/>
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<union id="vec128">
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<field name="v4_float" type="v4f"/>
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<field name="v2_double" type="v2d"/>
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<field name="v16_int8" type="v16i8"/>
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<field name="v8_int16" type="v8i16"/>
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<field name="v4_int32" type="v4i32"/>
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<field name="v2_int64" type="v2i64"/>
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<field name="uint128" type="uint128"/>
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</union>
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<flags id="i386_mxcsr" size="4">
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<field name="IE" start="0" end="0"/>
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<field name="DE" start="1" end="1"/>
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<field name="ZE" start="2" end="2"/>
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<field name="OE" start="3" end="3"/>
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<field name="UE" start="4" end="4"/>
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<field name="PE" start="5" end="5"/>
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<field name="DAZ" start="6" end="6"/>
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<field name="IM" start="7" end="7"/>
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<field name="DM" start="8" end="8"/>
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<field name="ZM" start="9" end="9"/>
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<field name="OM" start="10" end="10"/>
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<field name="UM" start="11" end="11"/>
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<field name="PM" start="12" end="12"/>
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<field name="FZ" start="15" end="15"/>
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</flags>
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<reg name="xmm0" bitsize="128" type="vec128"/>
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<reg name="xmm1" bitsize="128" type="vec128"/>
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<reg name="xmm2" bitsize="128" type="vec128"/>
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<reg name="xmm3" bitsize="128" type="vec128"/>
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<reg name="xmm4" bitsize="128" type="vec128"/>
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<reg name="xmm5" bitsize="128" type="vec128"/>
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<reg name="xmm6" bitsize="128" type="vec128"/>
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<reg name="xmm7" bitsize="128" type="vec128"/>
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<reg name="mxcsr" bitsize="32" type="i386_mxcsr" group="vector"/>
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</feature>
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