qemu/tcg/riscv
Richard Henderson 21e9a8aefb tcg: Add TCGConst argument to tcg_target_const_match
Fill the new argument from any condition within the opcode.
Not yet used within any backend.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-02-03 23:53:48 +00:00
..
tcg-target-con-set.h tcg/riscv: Support CTZ, CLZ from Zbb 2023-05-25 15:29:36 +00:00
tcg-target-con-str.h tcg/riscv: Support ANDN, ORN, XNOR from Zbb 2023-05-25 13:57:52 +00:00
tcg-target-reg-bits.h tcg: Split out tcg-target-reg-bits.h 2023-06-05 12:04:28 -07:00
tcg-target.c.inc tcg: Add TCGConst argument to tcg_target_const_match 2024-02-03 23:53:48 +00:00
tcg-target.h tcg: Introduce TCG_TARGET_HAS_tst 2024-02-03 23:43:48 +00:00