qemu/target
Zhao Liu f55cceac8c target/i386/sev: Fix missing ERRP_GUARD() for error_prepend()
As the comment in qapi/error, passing @errp to error_prepend() requires
ERRP_GUARD():

* = Why, when and how to use ERRP_GUARD() =
*
* Without ERRP_GUARD(), use of the @errp parameter is restricted:
...
* - It should not be passed to error_prepend(), error_vprepend() or
*   error_append_hint(), because that doesn't work with &error_fatal.
* ERRP_GUARD() lifts these restrictions.
*
* To use ERRP_GUARD(), add it right at the beginning of the function.
* @errp can then be used without worrying about the argument being
* NULL or &error_fatal.

ERRP_GUARD() could avoid the case when @errp is the pointer of
error_fatal, the user can't see this additional information, because
exit() happens in error_setg earlier than information is added [1].

The sev_inject_launch_secret() passes @errp to error_prepend(), and as
an APIs defined in target/i386/sev.h, it is necessary to protect its
@errp with ERRP_GUARD().

To avoid the issue like [1] said, add missing ERRP_GUARD() at the
beginning of this function.

[1]: Issue description in the commit message of commit ae7c80a7bd
     ("error: New macro ERRP_GUARD()").

Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Marcelo Tosatti <mtosatti@redhat.com>
Signed-off-by: Zhao Liu <zhao1.liu@intel.com>
Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20240229143914.1977550-17-zhao1.liu@linux.intel.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
2024-03-09 18:51:45 +01:00
..
alpha target/alpha: Enable TARGET_PAGE_BITS_VARY for user-only 2024-02-29 11:35:37 -10:00
arm target/arm: Move v7m-related code from cpu32.c into a separate file 2024-03-08 14:45:03 +00:00
avr gdbstub: Infer number of core registers from XML 2024-02-28 09:09:58 +00:00
cris include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
hexagon gdbstub: Infer number of core registers from XML 2024-02-28 09:09:58 +00:00
hppa target/hppa: Restore unwind_breg before calculating ior 2024-03-03 06:41:19 +01:00
i386 target/i386/sev: Fix missing ERRP_GUARD() for error_prepend() 2024-03-09 18:51:45 +01:00
loongarch target/loongarch: honour show_opcodes when disassembling 2024-03-06 12:35:51 +00:00
m68k gdbstub: Infer number of core registers from XML 2024-02-28 09:09:58 +00:00
microblaze gdbstub: Infer number of core registers from XML 2024-02-28 09:09:58 +00:00
mips target/mips: Remove the unused DisasContext::saar field 2024-02-15 15:53:12 +01:00
nios2 kconfig: use "select" to enable semihosting 2024-02-09 17:52:30 +00:00
openrisc include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
ppc target/ppc: Enable TARGET_PAGE_BITS_VARY for user-only 2024-02-29 11:35:37 -10:00
riscv target/riscv: Fix privilege mode of G-stage translation for debugging 2024-03-08 20:48:03 +10:00
rx gdbstub: Infer number of core registers from XML 2024-02-28 09:09:58 +00:00
s390x gdbstub: Infer number of core registers from XML 2024-02-28 09:09:58 +00:00
sh4 include/exec: Implement cpu_mmu_index generically 2024-02-03 16:46:10 +10:00
sparc accel/tcg: Add tlb_fill_flags to CPUTLBEntryFull 2024-03-05 13:22:56 +00:00
tricore include/exec: Change cpu_mmu_index argument to CPUState 2024-02-03 16:46:10 +10:00
xtensa kconfig: use "select" to enable semihosting 2024-02-09 17:52:30 +00:00
Kconfig hw/loongarch: Add support loongson3 virt machine type. 2022-06-06 18:09:03 +00:00
meson.build target: Make qemu_target_page_mask() available for *-user 2024-01-29 21:04:10 +10:00
target-common.c target: Make qemu_target_page_mask() available for *-user 2024-01-29 21:04:10 +10:00