Daniel Henrique Barboza 43d1de32f8 hw/riscv/virt.c: skip 'mmu-type' FDT if satp mode not set ... The absence of a satp mode in riscv_host_cpu_init() is causing the following error: $ ./qemu/build/qemu-system-riscv64 -machine virt,accel=kvm \ -m 2G -smp 1 -nographic -snapshot \ -kernel ./guest_imgs/Image \ -initrd ./guest_imgs/rootfs_kvm_riscv64.img \ -append "earlycon=sbi root=/dev/ram rw" \ -cpu host ** ERROR:../target/riscv/cpu.c:320:satp_mode_str: code should not be reached Bail out! ERROR:../target/riscv/cpu.c:320:satp_mode_str: code should not be reached Aborted The error is triggered from create_fdt_socket_cpus() in hw/riscv/virt.c. It's trying to get satp_mode_str for a NULL cpu->cfg.satp_mode.map. For this KVM cpu we would need to inherit the satp supported modes from the RISC-V host. At this moment this is not possible because the KVM driver does not support it. And even when it does we can't just let this broken for every other older kernel. Since mmu-type is not a required node, according to [1], skip the 'mmu-type' FDT node if there's no satp_mode set. We'll revisit this logic when we can get satp information from KVM. [1] https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/riscv/cpus.yaml Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20230706101738.460804-3-dbarboza@ventanamicro.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>		2023-07-10 22:29:15 +10:00
..
boot.c	hw/riscv/boot.c: make riscv_load_initrd() static	2023-02-16 07:55:37 -08:00
Kconfig	hw/riscv: sifive_e: Support the watchdog timer of HiFive 1 rev b.	2023-07-10 22:29:15 +10:00
meson.build	hw/riscv/virt: Enable basic ACPI infrastructure	2023-03-06 11:35:04 -08:00
microchip_pfsoc.c	hw/riscv/boot.c: consolidate all kernel init in riscv_load_kernel()	2023-02-16 07:55:30 -08:00
numa.c	hw/riscv: qemu crash when NUMA nodes exceed available CPUs	2023-06-13 17:20:31 +10:00
opentitan.c	hw/riscv/opentitan: Correct OpenTitanState parent type/size	2023-06-13 17:19:42 +10:00
riscv_hart.c
shakti_c.c	*: Add missing includes of qemu/error-report.h	2023-03-22 15:06:57 +00:00
sifive_e.c	hw/riscv: sifive_e: Support the watchdog timer of HiFive 1 rev b.	2023-07-10 22:29:15 +10:00
sifive_u.c	hw/riscv: Move the dtb load bits outside of create_fdt()	2023-03-01 17:19:14 -08:00
spike.c	hw/riscv: Validate cluster and NUMA node boundary	2023-06-26 10:23:01 +02:00
virt-acpi-build.c	*: Add missing includes of qemu/error-report.h	2023-03-22 15:06:57 +00:00
virt.c	hw/riscv/virt.c: skip 'mmu-type' FDT if satp mode not set	2023-07-10 22:29:15 +10:00