Richard Henderson f6ff4923b9 target/microblaze: Define TCG_GUEST_DEFAULT_MO ... The microblaze architecture does not reorder instructions. While there is an MBAR wait-for-data-access instruction, this concerns synchronizing with DMA. This should have been defined when enabling MTTCG. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Edgar E. Iglesias <edgar@zeroasic.com> Fixes: d449561b13 ("configure: microblaze: Enable mttcg") Signed-off-by: Richard Henderson <richard.henderson@linaro.org>		2023-06-26 17:33:00 +02:00
..
cpu-param.h	target/microblaze: Remove NB_MMU_MODES define	2023-03-13 06:44:37 -07:00
cpu-qom.h	target/microblaze: Convert to 3-phase reset	2022-12-16 15:58:15 +00:00
cpu.c	target/microblaze: Replace tb_pc() with tb->pc	2023-03-01 07:33:18 -10:00
cpu.h	target/microblaze: Define TCG_GUEST_DEFAULT_MO	2023-06-26 17:33:00 +02:00
gdbstub.c	gdbstub: move register helpers into standalone include	2023-03-07 20:44:08 +00:00
helper.c	accel/tcg: Remove will_exit argument from cpu_restore_state	2022-11-01 08:31:41 +11:00
helper.h
insns.decode
Kconfig
machine.c
meson.build	meson: Replace softmmu_ss -> system_ss	2023-06-20 10:01:30 +02:00
mmu.c
mmu.h
op_helper.c	bulk: Rename TARGET_FMT_plx -> HWADDR_FMT_plx	2023-01-18 11:14:34 +01:00
translate.c	accel/tcg: Introduce translator_io_start	2023-06-05 12:04:29 -07:00