qemu/target/openrisc
Richard Henderson e8f29049b1 linux-user: Implement signals for openrisc
All of the existing code was boilerplate from elsewhere,
and would crash the guest upon the first signal.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Stafford Horne <shorne@gmail.com>

---
v2:
  Add a comment to the new definition of target_pt_regs.
  Install the signal mask into the ucontext.
v3:
  Incorporate feedback from Laurent.
2018-07-03 22:40:33 +09:00
..
cpu.c linux-user: Implement signals for openrisc 2018-07-03 22:40:33 +09:00
cpu.h target/openrisc: Reorg tlb lookup 2018-07-03 22:40:33 +09:00
disas.c target/openrisc: Add print_insn_or1k 2018-07-03 00:05:28 +09:00
exception.c
exception.h
exception_helper.c
fpu_helper.c
gdbstub.c
helper.h target/openrisc: Form the spr index from tcg 2018-07-03 00:05:28 +09:00
insns.decode
interrupt.c target/openrisc: Fix cpu_mmu_index 2018-07-03 00:05:28 +09:00
interrupt_helper.c target/openrisc: Fix cpu_mmu_index 2018-07-03 00:05:28 +09:00
machine.c target/openrisc: Increase the TLB size 2018-07-03 00:05:28 +09:00
Makefile.objs target/openrisc: Merge mmu_helper.c into mmu.c 2018-07-03 00:05:28 +09:00
mmu.c target/openrisc: Reorg tlb lookup 2018-07-03 22:40:33 +09:00
sys_helper.c target/openrisc: Use identical sizes for ITLB and DTLB 2018-07-03 00:05:28 +09:00
translate.c target/openrisc: Fix cpu_mmu_index 2018-07-03 00:05:28 +09:00