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e80941bd64
There are lots of special cases within these insns. Split the major argument decode/loading/saving into no_output (compares), rd_is_dp, and rm_is_dp. We still need to special case argument load for compare (rd as input, rm as zero) and vcvt fixed (rd as input+output), but lots of special cases do disappear. Now that we have a full switch at the beginning, hoist the ISA checks from the code generation. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20190215192302.27855-4-richard.henderson@linaro.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| arm | ||
| cris | ||
| hppa | ||
| i386 | ||
| lm32 | ||
| m68k | ||
| microblaze | ||
| mips | ||
| moxie | ||
| nios2 | ||
| openrisc | ||
| ppc | ||
| riscv | ||
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| sh4 | ||
| sparc | ||
| tilegx | ||
| tricore | ||
| unicore32 | ||
| xtensa | ||