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36df75a0a9
The GNU assembler produces the following output for instructions
with upper immediates:
00002597 auipc a1,0x2
000024b7 lui s1,0x2
6409 lui s0,0x2 # c.lui
The immediate operands of upper immediates are not shifted.
However, the QEMU disassembler prints them shifted:
00002597 auipc a1,8192
000024b7 lui s1,8192
6409 lui s0,8192 # c.lui
The current implementation extracts the immediate bits and shifts the by 12,
so the internal representation of the immediate is the actual immediate.
However, the immediates are later printed using rv_fmt_rd_imm or
rv_fmt_rd_offset, which don't undo the shift.
Let's fix this by using specific output formats for instructions
with upper immediates, that take care of the shift.
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-Id: <20230711075051.1531007-1-christoph.muellner@vrull.eu>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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| .. | ||
| alpha.c | ||
| capstone.c | ||
| cris.c | ||
| disas-internal.h | ||
| disas-mon.c | ||
| disas.c | ||
| hexagon.c | ||
| hppa.c | ||
| m68k.c | ||
| meson.build | ||
| microblaze.c | ||
| mips.c | ||
| nanomips.c | ||
| nios2.c | ||
| riscv-xthead.c | ||
| riscv-xthead.h | ||
| riscv-xventana.c | ||
| riscv-xventana.h | ||
| riscv.c | ||
| riscv.h | ||
| sh4.c | ||
| sparc.c | ||
| xtensa.c | ||