..
insn_trans
trans_rvv.c.inc: remove 'is_store' bool from load/store fns
2024-03-08 20:48:03 +10:00
kvm
target/riscv/kvm: update KVM exts to Linux 6.8
2024-03-08 20:48:03 +10:00
tcg
target/riscv: Promote svade to a normal extension
2024-03-08 16:35:28 +10:00
arch_dump.c
target/riscv: Fix format for comments
2023-05-05 10:49:50 +10:00
bitmanip_helper.c
common-semi-target.h
cpu-param.h
target/riscv: Remove NB_MMU_MODES
define
2023-03-13 06:44:37 -07:00
cpu-qom.h
target/riscv: add rv32i, rv32e and rv64e CPUs
2024-02-09 20:49:41 +10:00
cpu.c
target/riscv: move ratified/frozen exts to non-experimental
2024-03-08 20:48:03 +10:00
cpu.h
target/riscv: mcountinhibit, mcounteren, scounteren, hcounteren is 32-bit
2024-03-08 20:48:03 +10:00
cpu_bits.h
target/riscv: FCSR doesn't contain vxrm and vxsat
2024-02-09 20:43:14 +10:00
cpu_cfg.h
RISC-V: Add support for Ztso
2024-03-08 19:47:48 +10:00
cpu_helper.c
target/riscv: Fix privilege mode of G-stage translation for debugging
2024-03-08 20:48:03 +10:00
cpu_user.h
cpu_vendorid.h
target/riscv: add Ventana's Veyron V1 CPU
2023-05-05 10:49:50 +10:00
crypto_helper.c
target/riscv: Use accelerated helper for AES64KS1I
2023-09-11 11:45:55 +10:00
csr.c
target/riscv: UPDATE xATP write CSR
2024-03-08 16:38:09 +10:00
debug.c
target/riscv: Implement optional CSR mcontext of debug Sdtrig extension
2024-02-09 20:40:32 +10:00
debug.h
target/riscv: Allocate itrigger timers only once
2023-09-11 11:45:55 +10:00
fpu_helper.c
riscv: Add support for the Zfa extension
2023-07-10 22:29:20 +10:00
gdbstub.c
gdbstub: Add members to identify registers to GDBFeature
2024-02-28 09:10:11 +00:00
helper.h
target/riscv: Add Zvksed ISA extension support
2023-09-11 11:45:55 +10:00
insn16.decode
target/riscv: add support for Zcmt extension
2023-05-05 10:49:50 +10:00
insn32.decode
target/riscv: Add support for Zacas extension
2024-01-10 18:47:47 +10:00
instmap.h
internals.h
target/riscv: Use env_archcpu() in [check_]nanbox()
2023-11-07 12:13:27 +01:00
Kconfig
kconfig: use "select" to enable semihosting
2024-02-09 17:52:30 +00:00
m128_helper.c
target/helpers: Remove unnecessary 'qemu/main-loop.h' header
2023-08-31 19:47:43 +02:00
machine.c
target/riscv: mcountinhibit, mcounteren, scounteren, hcounteren is 32-bit
2024-03-08 20:48:03 +10:00
meson.build
target/riscv: move KVM only files to kvm subdir
2023-10-12 12:20:24 +10:00
monitor.c
riscv: spelling fixes
2023-09-08 13:08:52 +03:00
op_helper.c
target/riscv: Replace cpu_mmu_index with riscv_env_mmu_index
2024-02-03 16:46:10 +10:00
pmp.c
target/riscv: pmp: Ignore writes when RW=01 and MML=0
2024-01-10 18:47:47 +10:00
pmp.h
target/riscv/pmp: Use hwaddr instead of target_ulong for RV32
2024-01-10 18:47:46 +10:00
pmu.c
target/riscv: Add "pmu-mask" property to replace "pmu-num"
2023-11-07 11:06:02 +10:00
pmu.h
target/riscv: Add missing include guard in pmu.h
2024-03-08 16:39:32 +10:00
riscv-qmp-cmds.c
riscv-qmp-cmds.c: add profile flags in cpu-model-expansion
2024-01-10 18:47:47 +10:00
sbi_ecall_interface.h
target/riscv: Fix format for comments
2023-05-05 10:49:50 +10:00
time_helper.c
target/riscv: Simplify type conversion for CPURISCVState
2023-05-05 10:49:49 +10:00
time_helper.h
target/riscv: Simplify type conversion for CPURISCVState
2023-05-05 10:49:49 +10:00
trace-events
trace.h
translate.c
RISC-V: Add support for Ztso
2024-03-08 19:47:48 +10:00
vcrypto_helper.c
target/riscv: Add Zvksed ISA extension support
2023-09-11 11:45:55 +10:00
vector_helper.c
target/riscv: Fix shift count overflow
2024-03-08 20:48:03 +10:00
vector_internals.c
riscv: Clean up includes
2024-01-30 21:20:20 +03:00
vector_internals.h
riscv: Clean up includes
2024-01-30 21:20:20 +03:00
xthead.decode
XVentanaCondOps.decode
zce_helper.c
target/riscv: add support for Zcmt extension
2023-05-05 10:49:50 +10:00