system/qemu
system/qemu
1
0
Fork 0
mirror of https://gitlab.com/qemu-project/qemu synced 2024-10-19 01:13:01 +00:00
Code Issues Packages Projects Releases Wiki Activity
qemu/target
History
Peter Maydell db7f1c3faf x86 queue, 2019-04-25 
* Hygon Dhyana CPU model (Pu Wen)
 * Categorize a few devices in hw/i386 (Ernest Esene)
 * Support host-cache-info on TOPOEXT CPUID leaf (Stanislav Lanci)
 -----BEGIN PGP SIGNATURE-----
 
 iQIcBAABCAAGBQJcwfiJAAoJECgHk2+YTcWm+c4QALOcxwskQAjUqclh+nc3GSWR
 FRk5wKQjDCrY8GyPVS0FoPiB1DltYoYv8np7J01mdCdmjgdgJh+iveD01LnCZCU5
 H70F7SdfQ1s8u7COtqckC5PumQQCgElu2A21enQadX/y7sSw4Tz1KdOUYgFenwYL
 ltmdbav+VkZdakPgEEa5B4bvWthGiHWc1aStwHGQwa2VnboH2E1XxlppTvvXFbae
 liNHBUfcWZ5oVjByDnwC+PqktBqZqRl67p0u4JSUkKaqglcSH6tuJA3eL4hkOU0n
 A+7XDd1wQSkQnj3eL27o0J2hKfzcHXjJTAMOCTwayv4X9FIGtCqofbbWjlrTIBV5
 MbNl30UtaZE4V7hxJ+QOZ9w5zZzd+wU65Rs9kq0tVAnP7UPtQEgR+lgED6yANJoc
 Gc3NCaQXX3yGsTCaT4pk6J8NGdiOcZyIk3UFpxTCzjs6gAcgD+1XlwHIz/9JNDV2
 dTFhBq7BQ7sb9c5tf7NfxobWWoYaR2pDo49G4O+r4xzICjKQyFzRIY2d/0RseKe0
 QBqMSXp1qZyLGSR4XwX1EkSZtrZAjWIyXO7e9QVkgsWsqsj1Z/KkggJYeLld49xF
 CVaI2hJErYVIh9jSnsY8Gr2OB6aTksGgu/BKl+OsF2vjtvWVstbpi+jyOWfwhnH2
 kU3psD6jx3v/sr+cr4Rj
 =72Bz
 -----END PGP SIGNATURE-----

Merge remote-tracking branch 'remotes/ehabkost/tags/x86-next-pull-request' into staging

x86 queue, 2019-04-25

* Hygon Dhyana CPU model (Pu Wen)
* Categorize a few devices in hw/i386 (Ernest Esene)
* Support host-cache-info on TOPOEXT CPUID leaf (Stanislav Lanci)

# gpg: Signature made Thu 25 Apr 2019 19:12:25 BST
# gpg:                using RSA key 2807936F984DC5A6
# gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full]
# Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF  D1AA 2807 936F 984D C5A6

* remotes/ehabkost/tags/x86-next-pull-request:
  Pass through cache information for TOPOEXT CPUs
  Categorize devices: iommu
  Categorize devices: IGD passthrough ISA bridge
  i386: Add new Hygon 'Dhyana' CPU model

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2019-04-26 16:38:04 +01:00
..
alpha qom/cpu: Simplify how CPUClass:cpu_dump_state() prints 2019-04-18 22:18:59 +02:00
arm qom/cpu: Simplify how CPUClass:cpu_dump_state() prints 2019-04-18 22:18:59 +02:00
cris qom/cpu: Simplify how CPUClass:cpu_dump_state() prints 2019-04-18 22:18:59 +02:00
hppa qom/cpu: Simplify how CPUClass:cpu_dump_state() prints 2019-04-18 22:18:59 +02:00
i386 Pass through cache information for TOPOEXT CPUs 2019-04-25 14:52:28 -03:00
lm32 qom/cpu: Simplify how CPUClass:cpu_dump_state() prints 2019-04-18 22:18:59 +02:00
m68k qom/cpu: Simplify how CPUClass:cpu_dump_state() prints 2019-04-18 22:18:59 +02:00
microblaze qom/cpu: Simplify how CPUClass:cpu_dump_state() prints 2019-04-18 22:18:59 +02:00
mips qom/cpu: Simplify how CPUClass:cpu_dump_state() prints 2019-04-18 22:18:59 +02:00
moxie qom/cpu: Simplify how CPUClass:cpu_dump_state() prints 2019-04-18 22:18:59 +02:00
nios2 qom/cpu: Simplify how CPUClass:cpu_dump_state() prints 2019-04-18 22:18:59 +02:00
openrisc disas: Rename include/disas/bfd.h back to include/disas/dis-asm.h 2019-04-18 22:18:59 +02:00
ppc exec: Introduce qemu_maxrampagesize() and rename qemu_getrampagesize() 2019-04-25 13:47:27 +02:00
riscv qom/cpu: Simplify how CPUClass:cpu_dump_state() prints 2019-04-18 22:18:59 +02:00
s390x s390x/kvm: Configure page size after memory has actually been initialized 2019-04-25 13:47:01 +02:00
sh4 qom/cpu: Simplify how CPUClass:cpu_dump_state() prints 2019-04-18 22:18:59 +02:00
sparc qom/cpu: Simplify how CPUClass:cpu_dump_state() prints 2019-04-18 22:18:59 +02:00
tilegx qom/cpu: Simplify how CPUClass:cpu_dump_state() prints 2019-04-18 22:18:59 +02:00
tricore qom/cpu: Simplify how CPUClass:cpu_dump_state() prints 2019-04-18 22:18:59 +02:00
unicore32 qom/cpu: Simplify how CPUClass:cpu_dump_state() prints 2019-04-18 22:18:59 +02:00
xtensa qom/cpu: Simplify how CPUClass:cpu_dump_state() prints 2019-04-18 22:18:59 +02:00