mirror of
https://gitlab.com/qemu-project/qemu
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1a987a1d5f
Signed-off-by: Jim Wilson <jimw@sifive.com> Signed-off-by: Chih-Min Chao <chihmin.chao@sifive.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
47 lines
2 KiB
XML
47 lines
2 KiB
XML
<?xml version="1.0"?>
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<!-- Copyright (C) 2018-2019 Free Software Foundation, Inc.
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Copying and distribution of this file, with or without modification,
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are permitted in any medium without royalty provided the copyright
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notice and this notice are preserved. -->
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<!-- Register numbers are hard-coded in order to maintain backward
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compatibility with older versions of tools that didn't use xml
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register descriptions. -->
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<!DOCTYPE feature SYSTEM "gdb-target.dtd">
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<feature name="org.gnu.gdb.riscv.cpu">
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<reg name="zero" bitsize="32" type="int" regnum="0"/>
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<reg name="ra" bitsize="32" type="code_ptr"/>
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<reg name="sp" bitsize="32" type="data_ptr"/>
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<reg name="gp" bitsize="32" type="data_ptr"/>
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<reg name="tp" bitsize="32" type="data_ptr"/>
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<reg name="t0" bitsize="32" type="int"/>
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<reg name="t1" bitsize="32" type="int"/>
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<reg name="t2" bitsize="32" type="int"/>
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<reg name="fp" bitsize="32" type="data_ptr"/>
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<reg name="s1" bitsize="32" type="int"/>
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<reg name="a0" bitsize="32" type="int"/>
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<reg name="a1" bitsize="32" type="int"/>
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<reg name="a2" bitsize="32" type="int"/>
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<reg name="a3" bitsize="32" type="int"/>
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<reg name="a4" bitsize="32" type="int"/>
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<reg name="a5" bitsize="32" type="int"/>
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<reg name="a6" bitsize="32" type="int"/>
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<reg name="a7" bitsize="32" type="int"/>
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<reg name="s2" bitsize="32" type="int"/>
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<reg name="s3" bitsize="32" type="int"/>
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<reg name="s4" bitsize="32" type="int"/>
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<reg name="s5" bitsize="32" type="int"/>
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<reg name="s6" bitsize="32" type="int"/>
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<reg name="s7" bitsize="32" type="int"/>
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<reg name="s8" bitsize="32" type="int"/>
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<reg name="s9" bitsize="32" type="int"/>
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<reg name="s10" bitsize="32" type="int"/>
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<reg name="s11" bitsize="32" type="int"/>
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<reg name="t3" bitsize="32" type="int"/>
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<reg name="t4" bitsize="32" type="int"/>
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<reg name="t5" bitsize="32" type="int"/>
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<reg name="t6" bitsize="32" type="int"/>
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<reg name="pc" bitsize="32" type="code_ptr"/>
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</feature>
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