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https://gitlab.com/qemu-project/qemu
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49a7f3aabb
This patch adds support for the XTheadCmo ISA extension. To avoid interfering with standard extensions, decoder and translation are in its own xthead* specific files. Future patches should be able to easily add additional T-Head extension. The implementation does not have much functionality (besides accepting the instructions and not qualifying them as illegal instructions if the hart executes in the required privilege level for the instruction), as QEMU does not model CPU caches and instructions are documented to not raise any exceptions. Co-developed-by: LIU Zhiwei <zhiwei_liu@linux.alibaba.com> Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20230131202013.2541053-2-christoph.muellner@vrull.eu> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
39 lines
1 KiB
Meson
39 lines
1 KiB
Meson
# FIXME extra_args should accept files()
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gen = [
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decodetree.process('insn16.decode', extra_args: ['--static-decode=decode_insn16', '--insnwidth=16']),
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decodetree.process('insn32.decode', extra_args: '--static-decode=decode_insn32'),
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decodetree.process('xthead.decode', extra_args: '--static-decode=decode_xthead'),
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decodetree.process('XVentanaCondOps.decode', extra_args: '--static-decode=decode_XVentanaCodeOps'),
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]
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riscv_ss = ss.source_set()
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riscv_ss.add(gen)
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riscv_ss.add(files(
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'cpu.c',
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'cpu_helper.c',
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'csr.c',
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'fpu_helper.c',
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'gdbstub.c',
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'op_helper.c',
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'vector_helper.c',
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'bitmanip_helper.c',
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'translate.c',
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'm128_helper.c',
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'crypto_helper.c'
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))
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riscv_ss.add(when: 'CONFIG_KVM', if_true: files('kvm.c'), if_false: files('kvm-stub.c'))
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riscv_softmmu_ss = ss.source_set()
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riscv_softmmu_ss.add(files(
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'arch_dump.c',
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'pmp.c',
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'debug.c',
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'monitor.c',
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'machine.c',
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'pmu.c',
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'time_helper.c'
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))
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target_arch += {'riscv': riscv_ss}
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target_softmmu_arch += {'riscv': riscv_softmmu_ss}
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