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qemu/target/tricore
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Bastian Koppelmann ce64babdf6 target/tricore: Correctly handle FPU RM from PSW 
when we reconstructed PSW using psw_read(), we were trying to clear the
cached USB bits out of env->PSW. The mask was wrong and we would clear
PSW.RM as well.

when we write the PSW using psw_write() we update the rounding modes in
env->fp_status for softfloat. The order of bits used by TriCore is not
the one used by softfloat.

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Message-ID: <20230828112651.522058-4-kbastian@mail.uni-paderborn.de>
2023-09-28 10:45:22 +02:00
..
cpu-param.h target/tricore: Remove NB_MMU_MODES define 2023-03-13 06:44:37 -07:00
cpu-qom.h target/tricore: Convert to 3-phase reset 2022-12-16 15:58:16 +00:00
cpu.c target/tricore: Rename tricore_feature 2023-07-25 17:18:51 +03:00
cpu.h target/tricore: Rename tricore_feature 2023-07-25 17:18:51 +03:00
csfr.h.inc other architectures: spelling fixes 2023-07-25 17:14:07 +03:00
fpu_helper.c tricore: add QSEED instruction 2019-06-25 15:02:07 +02:00
gdbstub.c gdbstub: move register helpers into standalone include 2023-03-07 20:44:08 +00:00
helper.c target/tricore: Correctly handle FPU RM from PSW 2023-09-28 10:45:22 +02:00
helper.h target/tricore: Implement CRCN insn 2023-09-28 10:45:22 +02:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
meson.build meson: Replace softmmu_ss -> system_ss 2023-06-20 10:01:30 +02:00
op_helper.c target/tricore: Implement CRCN insn 2023-09-28 10:45:22 +02:00
translate.c target/tricore: Implement CRCN insn 2023-09-28 10:45:22 +02:00
tricore-defs.h tcg: Split out target/arch/cpu-param.h 2019-06-10 07:03:34 -07:00
tricore-opcodes.h target/tricore: Implement CRCN insn 2023-09-28 10:45:22 +02:00