qemu/target/rx
Richard Henderson 597f9b2d30 accel/tcg: Pass max_insn to gen_intermediate_code by pointer
In preparation for returning the number of insns generated
via the same pointer.  Adjust only the prototypes so far.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2023-03-01 07:33:27 -10:00
..
cpu-param.h target/rx: CPU definitions 2020-03-19 17:58:05 +01:00
cpu-qom.h target/rx: Convert to 3-phase reset 2022-12-16 15:58:16 +00:00
cpu.c target/rx: Replace tb_pc() with tb->pc 2023-03-01 07:33:11 -10:00
cpu.h target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemu 2023-02-27 22:29:01 +01:00
disas.c meson: target 2020-08-21 06:30:35 -04:00
gdbstub.c Remove qemu-common.h include from most units 2022-04-06 14:31:55 +02:00
helper.c target/cpu: Restrict cpu_get_phys_page_debug() handlers to sysemu 2023-02-27 22:29:01 +01:00
helper.h target/rx: Drop checks for singlestep_enabled 2021-10-15 16:39:14 -07:00
insns.decode target/rx: Fix Lesser GPL version number 2020-10-27 00:22:56 +01:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
meson.build meson: target 2020-08-21 06:30:35 -04:00
op_helper.c treewide: Remove the unnecessary space before semicolon 2022-10-24 13:41:10 +02:00
translate.c accel/tcg: Pass max_insn to gen_intermediate_code by pointer 2023-03-01 07:33:27 -10:00