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![Stefan Hajnoczi](/assets/img/avatar_default.png)
Add a function to get the file descriptor for a RAMBlock. Device emulation code typically uses the MemoryRegion APIs but vhost-style code may use RAMBlock directly for sharing guest memory with another process. This new API will be used by the libblkio block driver so it can share guest memory via .bdrv_register_buf(). Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com> Message-id: 20221013185908.1297568-11-stefanha@redhat.com Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
171 lines
5.5 KiB
C
171 lines
5.5 KiB
C
#ifndef CPU_COMMON_H
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#define CPU_COMMON_H
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/* CPU interfaces that are target independent. */
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#ifndef CONFIG_USER_ONLY
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#include "exec/hwaddr.h"
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#endif
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/**
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* vaddr:
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* Type wide enough to contain any #target_ulong virtual address.
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*/
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typedef uint64_t vaddr;
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#define VADDR_PRId PRId64
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#define VADDR_PRIu PRIu64
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#define VADDR_PRIo PRIo64
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#define VADDR_PRIx PRIx64
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#define VADDR_PRIX PRIX64
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#define VADDR_MAX UINT64_MAX
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void cpu_exec_init_all(void);
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void cpu_exec_step_atomic(CPUState *cpu);
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/* Using intptr_t ensures that qemu_*_page_mask is sign-extended even
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* when intptr_t is 32-bit and we are aligning a long long.
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*/
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extern uintptr_t qemu_host_page_size;
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extern intptr_t qemu_host_page_mask;
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#define HOST_PAGE_ALIGN(addr) ROUND_UP((addr), qemu_host_page_size)
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#define REAL_HOST_PAGE_ALIGN(addr) ROUND_UP((addr), qemu_real_host_page_size())
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/* The CPU list lock nests outside page_(un)lock or mmap_(un)lock */
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void qemu_init_cpu_list(void);
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void cpu_list_lock(void);
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void cpu_list_unlock(void);
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unsigned int cpu_list_generation_id_get(void);
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void tcg_flush_softmmu_tlb(CPUState *cs);
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void tcg_flush_jmp_cache(CPUState *cs);
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void tcg_iommu_init_notifier_list(CPUState *cpu);
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void tcg_iommu_free_notifier_list(CPUState *cpu);
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#if !defined(CONFIG_USER_ONLY)
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enum device_endian {
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DEVICE_NATIVE_ENDIAN,
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DEVICE_BIG_ENDIAN,
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DEVICE_LITTLE_ENDIAN,
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};
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#if HOST_BIG_ENDIAN
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#define DEVICE_HOST_ENDIAN DEVICE_BIG_ENDIAN
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#else
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#define DEVICE_HOST_ENDIAN DEVICE_LITTLE_ENDIAN
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#endif
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/* address in the RAM (different from a physical address) */
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#if defined(CONFIG_XEN_BACKEND)
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typedef uint64_t ram_addr_t;
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# define RAM_ADDR_MAX UINT64_MAX
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# define RAM_ADDR_FMT "%" PRIx64
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#else
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typedef uintptr_t ram_addr_t;
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# define RAM_ADDR_MAX UINTPTR_MAX
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# define RAM_ADDR_FMT "%" PRIxPTR
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#endif
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/* memory API */
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void qemu_ram_remap(ram_addr_t addr, ram_addr_t length);
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/* This should not be used by devices. */
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ram_addr_t qemu_ram_addr_from_host(void *ptr);
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ram_addr_t qemu_ram_addr_from_host_nofail(void *ptr);
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RAMBlock *qemu_ram_block_by_name(const char *name);
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RAMBlock *qemu_ram_block_from_host(void *ptr, bool round_offset,
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ram_addr_t *offset);
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ram_addr_t qemu_ram_block_host_offset(RAMBlock *rb, void *host);
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void qemu_ram_set_idstr(RAMBlock *block, const char *name, DeviceState *dev);
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void qemu_ram_unset_idstr(RAMBlock *block);
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const char *qemu_ram_get_idstr(RAMBlock *rb);
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void *qemu_ram_get_host_addr(RAMBlock *rb);
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ram_addr_t qemu_ram_get_offset(RAMBlock *rb);
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ram_addr_t qemu_ram_get_used_length(RAMBlock *rb);
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ram_addr_t qemu_ram_get_max_length(RAMBlock *rb);
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bool qemu_ram_is_shared(RAMBlock *rb);
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bool qemu_ram_is_noreserve(RAMBlock *rb);
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bool qemu_ram_is_uf_zeroable(RAMBlock *rb);
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void qemu_ram_set_uf_zeroable(RAMBlock *rb);
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bool qemu_ram_is_migratable(RAMBlock *rb);
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void qemu_ram_set_migratable(RAMBlock *rb);
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void qemu_ram_unset_migratable(RAMBlock *rb);
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int qemu_ram_get_fd(RAMBlock *rb);
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size_t qemu_ram_pagesize(RAMBlock *block);
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size_t qemu_ram_pagesize_largest(void);
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/**
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* cpu_address_space_init:
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* @cpu: CPU to add this address space to
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* @asidx: integer index of this address space
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* @prefix: prefix to be used as name of address space
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* @mr: the root memory region of address space
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*
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* Add the specified address space to the CPU's cpu_ases list.
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* The address space added with @asidx 0 is the one used for the
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* convenience pointer cpu->as.
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* The target-specific code which registers ASes is responsible
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* for defining what semantics address space 0, 1, 2, etc have.
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*
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* Before the first call to this function, the caller must set
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* cpu->num_ases to the total number of address spaces it needs
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* to support.
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*
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* Note that with KVM only one address space is supported.
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*/
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void cpu_address_space_init(CPUState *cpu, int asidx,
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const char *prefix, MemoryRegion *mr);
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void cpu_physical_memory_rw(hwaddr addr, void *buf,
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hwaddr len, bool is_write);
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static inline void cpu_physical_memory_read(hwaddr addr,
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void *buf, hwaddr len)
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{
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cpu_physical_memory_rw(addr, buf, len, false);
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}
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static inline void cpu_physical_memory_write(hwaddr addr,
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const void *buf, hwaddr len)
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{
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cpu_physical_memory_rw(addr, (void *)buf, len, true);
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}
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void cpu_reloading_memory_map(void);
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void *cpu_physical_memory_map(hwaddr addr,
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hwaddr *plen,
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bool is_write);
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void cpu_physical_memory_unmap(void *buffer, hwaddr len,
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bool is_write, hwaddr access_len);
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void cpu_register_map_client(QEMUBH *bh);
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void cpu_unregister_map_client(QEMUBH *bh);
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bool cpu_physical_memory_is_io(hwaddr phys_addr);
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/* Coalesced MMIO regions are areas where write operations can be reordered.
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* This usually implies that write operations are side-effect free. This allows
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* batching which can make a major impact on performance when using
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* virtualization.
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*/
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void qemu_flush_coalesced_mmio_buffer(void);
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void cpu_flush_icache_range(hwaddr start, hwaddr len);
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typedef int (RAMBlockIterFunc)(RAMBlock *rb, void *opaque);
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int qemu_ram_foreach_block(RAMBlockIterFunc func, void *opaque);
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int ram_block_discard_range(RAMBlock *rb, uint64_t start, size_t length);
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#endif
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/* Returns: 0 on success, -1 on error */
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int cpu_memory_rw_debug(CPUState *cpu, vaddr addr,
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void *ptr, size_t len, bool is_write);
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/* vl.c */
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extern int singlestep;
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void list_cpus(const char *optarg);
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#endif /* CPU_COMMON_H */
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