mirror of
https://gitlab.com/qemu-project/qemu
synced 2024-11-05 20:35:44 +00:00
6ea83fedc8
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1964 c046a42c-6fe2-441c-8c8c-71466251a162
119 lines
3 KiB
C
119 lines
3 KiB
C
#if !defined(__QEMU_MIPS_EXEC_H__)
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#define __QEMU_MIPS_EXEC_H__
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//#define DEBUG_OP
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#include "mips-defs.h"
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#include "dyngen-exec.h"
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register struct CPUMIPSState *env asm(AREG0);
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#if defined (USE_64BITS_REGS)
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typedef int64_t host_int_t;
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typedef uint64_t host_uint_t;
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#else
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typedef int32_t host_int_t;
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typedef uint32_t host_uint_t;
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#endif
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register host_uint_t T0 asm(AREG1);
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register host_uint_t T1 asm(AREG2);
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register host_uint_t T2 asm(AREG3);
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#if defined (USE_HOST_FLOAT_REGS)
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#error "implement me."
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#else
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#define FDT0 (env->ft0.fd)
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#define FDT1 (env->ft1.fd)
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#define FDT2 (env->ft2.fd)
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#define FST0 (env->ft0.fs[FP_ENDIAN_IDX])
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#define FST1 (env->ft1.fs[FP_ENDIAN_IDX])
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#define FST2 (env->ft2.fs[FP_ENDIAN_IDX])
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#define DT0 (env->ft0.d)
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#define DT1 (env->ft1.d)
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#define DT2 (env->ft2.d)
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#define WT0 (env->ft0.w[FP_ENDIAN_IDX])
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#define WT1 (env->ft1.w[FP_ENDIAN_IDX])
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#define WT2 (env->ft2.w[FP_ENDIAN_IDX])
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#endif
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#if defined (DEBUG_OP)
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#define RETURN() __asm__ __volatile__("nop");
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#else
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#define RETURN() __asm__ __volatile__("");
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#endif
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#include "cpu.h"
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#include "exec-all.h"
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#if !defined(CONFIG_USER_ONLY)
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#include "softmmu_exec.h"
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#endif /* !defined(CONFIG_USER_ONLY) */
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static inline void env_to_regs(void)
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{
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}
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static inline void regs_to_env(void)
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{
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}
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#if (HOST_LONG_BITS == 32)
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void do_mult (void);
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void do_multu (void);
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void do_madd (void);
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void do_maddu (void);
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void do_msub (void);
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void do_msubu (void);
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#endif
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void do_mfc0(int reg, int sel);
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void do_mtc0(int reg, int sel);
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void do_tlbwi (void);
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void do_tlbwr (void);
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void do_tlbp (void);
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void do_tlbr (void);
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#ifdef MIPS_USES_FPU
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void dump_fpu(CPUState *env);
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void fpu_dump_state(CPUState *env, FILE *f,
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int (*fpu_fprintf)(FILE *f, const char *fmt, ...),
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int flags);
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#endif
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void dump_sc (void);
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void do_lwl_raw (uint32_t);
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void do_lwr_raw (uint32_t);
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uint32_t do_swl_raw (uint32_t);
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uint32_t do_swr_raw (uint32_t);
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#if !defined(CONFIG_USER_ONLY)
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void do_lwl_user (uint32_t);
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void do_lwl_kernel (uint32_t);
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void do_lwr_user (uint32_t);
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void do_lwr_kernel (uint32_t);
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uint32_t do_swl_user (uint32_t);
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uint32_t do_swl_kernel (uint32_t);
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uint32_t do_swr_user (uint32_t);
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uint32_t do_swr_kernel (uint32_t);
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#endif
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void do_pmon (int function);
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void dump_sc (void);
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int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw,
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int is_user, int is_softmmu);
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void do_interrupt (CPUState *env);
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void cpu_loop_exit(void);
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void do_raise_exception_err (uint32_t exception, int error_code);
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void do_raise_exception (uint32_t exception);
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void do_raise_exception_direct (uint32_t exception);
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void cpu_dump_state(CPUState *env, FILE *f,
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int (*cpu_fprintf)(FILE *f, const char *fmt, ...),
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int flags);
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void cpu_mips_irqctrl_init (void);
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uint32_t cpu_mips_get_random (CPUState *env);
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uint32_t cpu_mips_get_count (CPUState *env);
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void cpu_mips_store_count (CPUState *env, uint32_t value);
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void cpu_mips_store_compare (CPUState *env, uint32_t value);
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void cpu_mips_clock_init (CPUState *env);
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#endif /* !defined(__QEMU_MIPS_EXEC_H__) */
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