Bin Meng bc7dca13b7 target/riscv: Add some comments for sstatus CSR in riscv_cpu_dump_state() ... sstatus register dump is currently missing in riscv_cpu_dump_state(). As sstatus is a copy of mstatus, which is described in the priv spec, it seems redundant to print the same information twice. Add some comments for this to let people know this is intentional. Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20221125050354.3166023-1-bmeng@tinylab.org> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>		2023-01-06 10:42:55 +10:00
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alpha	accel/tcg: Remove will_exit argument from cpu_restore_state	2022-11-01 08:31:41 +11:00
arm	target/arm: Convert to 3-phase reset	2022-12-16 15:58:15 +00:00
avr	target/avr: Convert to 3-phase reset	2022-12-16 15:58:15 +00:00
cris	target/cris: Convert to 3-phase reset	2022-12-16 15:58:15 +00:00
hexagon	1)	2022-12-18 17:02:11 +00:00
hppa	target/hppa: Fix fid instruction emulation	2022-12-19 23:14:06 +01:00
i386	target/i386: Convert to 3-phase reset	2022-12-16 15:58:15 +00:00
loongarch	target/loongarch: Convert to 3-phase reset	2022-12-16 15:58:15 +00:00
m68k	target/m68k: Convert to 3-phase reset	2022-12-16 15:58:15 +00:00
microblaze	target/microblaze: Convert to 3-phase reset	2022-12-16 15:58:15 +00:00
mips	target/mips: Convert to 3-phase reset	2022-12-16 15:58:15 +00:00
nios2	target/nios2: Convert to 3-phase reset	2022-12-16 15:58:15 +00:00
openrisc	target/openrisc: Convert to 3-phase reset	2022-12-16 15:58:15 +00:00
ppc	target/ppc: Check DEXCR on hash{st, chk} instructions	2022-12-21 14:17:55 -03:00
riscv	target/riscv: Add some comments for sstatus CSR in riscv_cpu_dump_state()	2023-01-06 10:42:55 +10:00
rx	target/rx: Convert to 3-phase reset	2022-12-16 15:58:16 +00:00
s390x	target/s390x: The MVCP and MVCS instructions are not privileged	2022-12-15 15:02:34 +01:00
sh4	target/sh4: Mask restore of env->flags from tb->flags	2022-12-18 09:36:07 -08:00
sparc	target/sparc: Convert to 3-phase reset	2022-12-16 15:58:16 +00:00
tricore	target/tricore: Fix gdbstub write to address registers	2022-12-18 09:39:17 -08:00
xtensa	target/xtensa: Convert to 3-phase reset	2022-12-16 15:58:16 +00:00
Kconfig	hw/loongarch: Add support loongson3 virt machine type.	2022-06-06 18:09:03 +00:00
meson.build	target/loongarch: Add target build suport	2022-06-06 18:09:03 +00:00