qemu/target/openrisc/meson.build
Richard Henderson 12f0bc5579 target/openrisc: Make openrisc_cpu_tlb_fill sysemu only
The fallback code in cpu_loop_exit_sigsegv is sufficient for
openrisc linux-user.

This makes all of the code in mmu.c sysemu only, so remove
the ifdefs and move the file to openrisc_softmmu_ss.
Remove the code from cpu_loop that handled EXCP_DPF.

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2021-11-02 07:00:52 -04:00

26 lines
491 B
Meson

gen = decodetree.process('insns.decode')
openrisc_ss = ss.source_set()
openrisc_ss.add(gen)
openrisc_ss.add(files(
'cpu.c',
'disas.c',
'exception.c',
'exception_helper.c',
'fpu_helper.c',
'gdbstub.c',
'interrupt_helper.c',
'sys_helper.c',
'translate.c',
))
openrisc_softmmu_ss = ss.source_set()
openrisc_softmmu_ss.add(files(
'interrupt.c',
'machine.c',
'mmu.c',
))
target_arch += {'openrisc': openrisc_ss}
target_softmmu_arch += {'openrisc': openrisc_softmmu_ss}