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![Jonathan Cameron](/assets/img/avatar_default.png)
Previously not all references mentioned any spec version at all. Given r3.1 is the current specification available for evaluation at www.computeexpresslink.org update references to refer to that. Hopefully this won't become a never ending job. A few structure definitions have been updated to add new fields. Defaults of 0 and read only are valid choices for these new DVSEC registers so go with that for now. There are additional error codes and some of the 'questions' in the comments are resolved now. Update documentation reference to point to the CXL r3.1 specification with naming closer to what is on the cover. For cases where there are structure version numbers, add defines so they can be found next to the register definitions. Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20240126121636.24611-6-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
250 lines
6.5 KiB
C
250 lines
6.5 KiB
C
/*
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* CXL Event processing
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*
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* Copyright(C) 2023 Intel Corporation.
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*
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* This work is licensed under the terms of the GNU GPL, version 2. See the
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* COPYING file in the top-level directory.
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*/
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#include "qemu/osdep.h"
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#include "qemu/bswap.h"
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#include "qemu/error-report.h"
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#include "hw/pci/msi.h"
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#include "hw/pci/msix.h"
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#include "hw/cxl/cxl.h"
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#include "hw/cxl/cxl_events.h"
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/* Artificial limit on the number of events a log can hold */
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#define CXL_TEST_EVENT_OVERFLOW 8
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static void reset_overflow(CXLEventLog *log)
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{
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log->overflow_err_count = 0;
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log->first_overflow_timestamp = 0;
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log->last_overflow_timestamp = 0;
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}
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void cxl_event_init(CXLDeviceState *cxlds, int start_msg_num)
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{
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CXLEventLog *log;
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int i;
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for (i = 0; i < CXL_EVENT_TYPE_MAX; i++) {
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log = &cxlds->event_logs[i];
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log->next_handle = 1;
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log->overflow_err_count = 0;
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log->first_overflow_timestamp = 0;
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log->last_overflow_timestamp = 0;
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log->irq_enabled = false;
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log->irq_vec = start_msg_num++;
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qemu_mutex_init(&log->lock);
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QSIMPLEQ_INIT(&log->events);
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}
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/* Override -- Dynamic Capacity uses the same vector as info */
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cxlds->event_logs[CXL_EVENT_TYPE_DYNAMIC_CAP].irq_vec =
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cxlds->event_logs[CXL_EVENT_TYPE_INFO].irq_vec;
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}
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static CXLEvent *cxl_event_get_head(CXLEventLog *log)
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{
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return QSIMPLEQ_FIRST(&log->events);
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}
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static CXLEvent *cxl_event_get_next(CXLEvent *entry)
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{
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return QSIMPLEQ_NEXT(entry, node);
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}
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static int cxl_event_count(CXLEventLog *log)
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{
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CXLEvent *event;
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int rc = 0;
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QSIMPLEQ_FOREACH(event, &log->events, node) {
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rc++;
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}
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return rc;
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}
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static bool cxl_event_empty(CXLEventLog *log)
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{
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return QSIMPLEQ_EMPTY(&log->events);
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}
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static void cxl_event_delete_head(CXLDeviceState *cxlds,
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CXLEventLogType log_type,
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CXLEventLog *log)
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{
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CXLEvent *entry = cxl_event_get_head(log);
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reset_overflow(log);
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QSIMPLEQ_REMOVE_HEAD(&log->events, node);
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if (cxl_event_empty(log)) {
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cxl_event_set_status(cxlds, log_type, false);
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}
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g_free(entry);
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}
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/*
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* return true if an interrupt should be generated as a result
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* of inserting this event.
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*/
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bool cxl_event_insert(CXLDeviceState *cxlds, CXLEventLogType log_type,
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CXLEventRecordRaw *event)
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{
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uint64_t time;
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CXLEventLog *log;
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CXLEvent *entry;
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if (log_type >= CXL_EVENT_TYPE_MAX) {
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return false;
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}
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time = cxl_device_get_timestamp(cxlds);
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log = &cxlds->event_logs[log_type];
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QEMU_LOCK_GUARD(&log->lock);
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if (cxl_event_count(log) >= CXL_TEST_EVENT_OVERFLOW) {
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if (log->overflow_err_count == 0) {
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log->first_overflow_timestamp = time;
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}
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log->overflow_err_count++;
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log->last_overflow_timestamp = time;
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return false;
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}
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entry = g_new0(CXLEvent, 1);
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memcpy(&entry->data, event, sizeof(*event));
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entry->data.hdr.handle = cpu_to_le16(log->next_handle);
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log->next_handle++;
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/* 0 handle is never valid */
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if (log->next_handle == 0) {
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log->next_handle++;
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}
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entry->data.hdr.timestamp = cpu_to_le64(time);
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QSIMPLEQ_INSERT_TAIL(&log->events, entry, node);
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cxl_event_set_status(cxlds, log_type, true);
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/* Count went from 0 to 1 */
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return cxl_event_count(log) == 1;
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}
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CXLRetCode cxl_event_get_records(CXLDeviceState *cxlds, CXLGetEventPayload *pl,
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uint8_t log_type, int max_recs,
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size_t *len)
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{
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CXLEventLog *log;
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CXLEvent *entry;
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uint16_t nr;
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if (log_type >= CXL_EVENT_TYPE_MAX) {
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return CXL_MBOX_INVALID_INPUT;
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}
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log = &cxlds->event_logs[log_type];
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QEMU_LOCK_GUARD(&log->lock);
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entry = cxl_event_get_head(log);
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for (nr = 0; entry && nr < max_recs; nr++) {
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memcpy(&pl->records[nr], &entry->data, CXL_EVENT_RECORD_SIZE);
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entry = cxl_event_get_next(entry);
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}
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if (!cxl_event_empty(log)) {
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pl->flags |= CXL_GET_EVENT_FLAG_MORE_RECORDS;
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}
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if (log->overflow_err_count) {
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pl->flags |= CXL_GET_EVENT_FLAG_OVERFLOW;
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pl->overflow_err_count = cpu_to_le16(log->overflow_err_count);
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pl->first_overflow_timestamp =
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cpu_to_le64(log->first_overflow_timestamp);
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pl->last_overflow_timestamp =
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cpu_to_le64(log->last_overflow_timestamp);
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}
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pl->record_count = cpu_to_le16(nr);
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*len = CXL_EVENT_PAYLOAD_HDR_SIZE + (CXL_EVENT_RECORD_SIZE * nr);
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return CXL_MBOX_SUCCESS;
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}
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CXLRetCode cxl_event_clear_records(CXLDeviceState *cxlds,
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CXLClearEventPayload *pl)
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{
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CXLEventLog *log;
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uint8_t log_type;
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CXLEvent *entry;
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int nr;
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log_type = pl->event_log;
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if (log_type >= CXL_EVENT_TYPE_MAX) {
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return CXL_MBOX_INVALID_INPUT;
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}
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log = &cxlds->event_logs[log_type];
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QEMU_LOCK_GUARD(&log->lock);
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/*
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* Must iterate the queue twice.
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* "The device shall verify the event record handles specified in the input
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* payload are in temporal order. If the device detects an older event
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* record that will not be cleared when Clear Event Records is executed,
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* the device shall return the Invalid Handle return code and shall not
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* clear any of the specified event records."
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* -- CXL r3.1 Section 8.2.9.2.3: Clear Event Records (0101h)
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*/
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entry = cxl_event_get_head(log);
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for (nr = 0; entry && nr < pl->nr_recs; nr++) {
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uint16_t handle = pl->handle[nr];
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/* NOTE: Both handles are little endian. */
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if (handle == 0 || entry->data.hdr.handle != handle) {
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return CXL_MBOX_INVALID_INPUT;
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}
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entry = cxl_event_get_next(entry);
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}
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entry = cxl_event_get_head(log);
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for (nr = 0; entry && nr < pl->nr_recs; nr++) {
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cxl_event_delete_head(cxlds, log_type, log);
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entry = cxl_event_get_head(log);
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}
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return CXL_MBOX_SUCCESS;
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}
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void cxl_event_irq_assert(CXLType3Dev *ct3d)
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{
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CXLDeviceState *cxlds = &ct3d->cxl_dstate;
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PCIDevice *pdev = &ct3d->parent_obj;
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int i;
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for (i = 0; i < CXL_EVENT_TYPE_MAX; i++) {
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CXLEventLog *log = &cxlds->event_logs[i];
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if (!log->irq_enabled || cxl_event_empty(log)) {
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continue;
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}
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/* Notifies interrupt, legacy IRQ is not supported */
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if (msix_enabled(pdev)) {
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msix_notify(pdev, log->irq_vec);
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} else if (msi_enabled(pdev)) {
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msi_notify(pdev, log->irq_vec);
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}
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}
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}
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